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Fri, 11 Oct 2024 17:34:23 +0200 Message-ID: <0b995a34-28c4-4ba6-8ad2-e8413c6a63f5@web.de> Date: Fri, 11 Oct 2024 17:34:02 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 2/2] irqchip/aspeed-intc: Add support for AST27XX INTC To: Kevin Chen , linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Andrew Jeffery , Conor Dooley , Joel Stanley , Krzysztof Kozlowski , Rob Herring , Thomas Gleixner , BMC-SW Cc: LKML , kernel-janitors@vger.kernel.org References: <20241009115813.2908803-3-kevin_chen@aspeedtech.com> Content-Language: en-GB From: Markus Elfring In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:i9rIChLNyWYHyUTxDAbalAUCtiWIR3TehRTXM4XO7QD22dAeIcU 2Je5blRBlhhl0Zu8Fe4xt31/nZvF0LqZnWssAuOLPnytex7FWgro8OETzQRTGPAkWKFWErq PduH+/NIVn9OhZGSWl2zSSFzMW5gROLqxdQVoDFwdulPU9K6gtHPo14dUC3u1+rChTDKJtL DUB9dP0zI/qwHYP6d/BnQ== X-Spam-Flag: NO UI-OutboundReport: notjunk:1;M01:P0:qREi+IcNmIk=;6u/CF+JhpeuSNi2B8eBr9G1Gnsx CvZzyNmfatpqrkh36kagQPFRZ8MJvhp3MxDk1VnrpA3lJsSYOjvVkwfNvvs/La6WoBezcNFE2 awRiKpI1MJOmtzOlnUMz/SwJ4TInqHpj7he0Aczhkx/o2mHpyzk1vDib1gXpSyJlJt7c15M/u Q1arjIfzyRzFUB50BywjGO+sSy4VOVImWPVYYBKtT6rhDUuh5AonDVqrABkeLICYpJrMIX8ay tSlx9Wmc++Vv499RKLX2++QWnRuhEEDPqZ3CmzMwXgIyP+1SgTmB7U8H6eVptaOkxBS9b9INH llkyCmpV5u5igXtlpaWE+AYVWEQbghrShNO1KDcT4aGbZImSJPDUOP0vMwlMIk4SddF3QwpwN 0Jg+V/VGv3tCBH2dZRzS5If2IdO/Io52ow2XxuP+atJ1otphVPnFoCSRYcxUUjrIIBE3hf4+N StoKVjbQNTTvYtc40XP4yGwK5opBqM5skP3HRs4Z/3dzBBMrxdKiHb/Jw+TWjSsJNXrxP9fmC AyOtI3obcyOyiTyEG6jCpZd5srzeDbMKCJzN5T+wDJ3Xg5G3Gr8t+9Cm5nxcyYSYMFV7LQvMW YGNNjng/vKrwI6gDZDZBGsnPLhrd3djXTOVA/Qr6vzmcE17UUhCTEfxPRuvHSbkGsXtc3CVwb MZWc7oDxYyI6olMudjvl+weL3q0qUxj17d2w59buC3MAq1YUSYkLeanmA8ZiH25QluLCcPw/a zud8Zi5+ecyXltL/rADHaWGpKXxfB45pAND3MBEZsfraK8YM1Y0DlEXzfGEvvGXarxMLURVcn eH3D6/Kh11MU8Z98HRyb43kw== >> =E2=80=A6 >>> +++ b/drivers/irqchip/irq-aspeed-intc.c >>> @@ -0,0 +1,139 @@ >> =E2=80=A6 >>> +static void aspeed_intc_ic_irq_handler(struct irq_desc *desc) >> +{ >>> + struct aspeed_intc_ic *intc_ic =3D irq_desc_get_handler_data(desc); >>> + struct irq_chip *chip =3D irq_desc_get_chip(desc); >>> + unsigned long bit, status; >> >> I suggest to reduce the scopes for three local variables. > May I check the scopes of bit and status usage? > Variables of bit and status are used in for_each_set_bit. > How could I reduce the scopes? I propose to move selected variable definitions into corresponding compoun= d statements (by using extra curly brackets). https://refactoring.com/catalog/reduceScopeOfVariable.html >> Would you become interested to collaborate with another scoped guard fo= r >> this programming interface? >> https://elixir.bootlin.com/linux/v6.12-rc2/source/include/linux/irqchip= /chained >> _irq.h#L13 > > Maybe like the change in the following? > > diff --git a/drivers/irqchip/irq-aspeed-intc.c b/drivers/irqchip/irq-asp= eed-intc.c > index ef1c095ad09e..54d1881c56c6 100644 > --- a/drivers/irqchip/irq-aspeed-intc.c > +++ b/drivers/irqchip/irq-aspeed-intc.c > @@ -32,7 +32,7 @@ static void aspeed_intc_ic_irq_handler(struct irq_desc= *desc) > struct irq_chip *chip =3D irq_desc_get_chip(desc); > unsigned long bit, status; > > - chained_irq_enter(chip, desc); > + guard(chained_irq)(desc); > > scoped_guard(raw_spinlock, &intc_ic->gic_lock) { > status =3D readl(intc_ic->base + INTC_INT_STATUS_REG); Perhaps. > @@ -41,8 +41,6 @@ static void aspeed_intc_ic_irq_handler(struct irq_desc= *desc) > writel(BIT(bit), intc_ic->base + INTC_INT_STATUS= _REG); > } > } > - > - chained_irq_exit(chip, desc); > } =E2=80=A6 Probably, yes. =E2=80=A6 > +++ b/include/linux/irqchip/chained_irq.h > @@ -38,4 +38,5 @@ static inline void chained_irq_exit(struct irq_chip *c= hip, > chip->irq_unmask(&desc->irq_data); > } > > +DEFINE_GUARD (chained_irq, struct irq_desc * , chained_irq_exit ( _T ->= irq_data.chip, _T ), chained_irq_enter (_T->irq_data.chip, _T)) =E2=80=A6 * Such a macro call looks promising. Would you like to omit any space characters before open parentheses? * Would you like to support scoped guard variants accordingly? Regards, Markus