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Thu, 08 Jan 2026 02:55:10 -0800 (PST) Message-ID: <0c09a8c461db5a09e75de4587eef38bffbccf2d2.camel@linaro.org> Subject: Re: [PATCH v7 3/4] clk: samsung: Implement automatic clock gating mode for CMUs From: =?ISO-8859-1?Q?Andr=E9?= Draszik To: Marek Szyprowski , Peter Griffin , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Tudor Ambarus , Michael Turquette , Stephen Boyd , Sam Protsenko , Sylwester Nawrocki , Chanwoo Choi Cc: Will McVicker , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, kernel-team@android.com Date: Thu, 08 Jan 2026 10:55:45 +0000 In-Reply-To: <8b2c412d-3e1e-4be0-a9d5-ef67f6f0d409@samsung.com> References: <20251222-automatic-clocks-v7-0-fec86fa89874@linaro.org> <20251222-automatic-clocks-v7-3-fec86fa89874@linaro.org> <8b2c412d-3e1e-4be0-a9d5-ef67f6f0d409@samsung.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.2-2+build3 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Hi Marek, On Thu, 2026-01-08 at 00:59 +0100, Marek Szyprowski wrote: > > @@ -334,10 +456,20 @@ void samsung_clk_extended_sleep_init(void __iomem= *reg_base, > > =C2=A0=C2=A0=C2=A0 * samsung_cmu_register_clocks() - Register all clock= s provided in CMU object > > =C2=A0=C2=A0=C2=A0 * @ctx: Clock provider object > > =C2=A0=C2=A0=C2=A0 * @cmu: CMU object with clocks to register > > + * @np:=C2=A0 CMU device tree node > > =C2=A0=C2=A0=C2=A0 */ > > =C2=A0=C2=A0 void __init samsung_cmu_register_clocks(struct samsung_clk= _provider *ctx, > > - const struct samsung_cmu_info *cmu) > > + const struct samsung_cmu_info *cmu, > > + struct device_node *np) > > =C2=A0=C2=A0 { > > + if (samsung_is_auto_capable(np) && cmu->auto_clock_gate) > > + ctx->auto_clock_gate =3D cmu->auto_clock_gate; >=20 > Do we need to issue "incorrect res size for automatic clocks" warning=20 > for every legacy Exynos based board? The check above should be in=20 > reverse order: >=20 > if (cmu->auto_clock_gates && amsung_is_auto_capable(np)) > ctx->auto_clock_gate =3D cmu->auto_clock_gate; Good suggestion. I have one or two cleanups anyway, I'll add that as well. Thanks for spotting this! Cheers, Andre'