From: Nicolin Chen <nicolinc@nvidia.com>
To: <maz@kernel.org>, <tglx@linutronix.de>, <bhelgaas@google.com>,
<alex.williamson@redhat.com>
Cc: <jgg@nvidia.com>, <leonro@nvidia.com>,
<shameerali.kolothum.thodi@huawei.com>, <robin.murphy@arm.com>,
<dlemoal@kernel.org>, <kevin.tian@intel.com>,
<smostafa@google.com>, <andriy.shevchenko@linux.intel.com>,
<reinette.chatre@intel.com>, <eric.auger@redhat.com>,
<ddutile@redhat.com>, <yebin10@huawei.com>, <brauner@kernel.org>,
<apatel@ventanamicro.com>, <shivamurthy.shastri@linutronix.de>,
<anna-maria@linutronix.de>, <nipun.gupta@amd.com>,
<marek.vasut+renesas@mailbox.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<kvm@vger.kernel.org>
Subject: [PATCH RFCv1 5/7] PCI/MSI: Extract a common __pci_alloc_irq_vectors function
Date: Fri, 8 Nov 2024 21:48:50 -0800 [thread overview]
Message-ID: <0c09c2b1cef3eb085a2f4fd33105eb18aed2b611.1731130093.git.nicolinc@nvidia.com> (raw)
In-Reply-To: <cover.1731130093.git.nicolinc@nvidia.com>
Extract a common function from the existing callers, to prepare for a new
helper that provides an array of msi_iovas. Also, extract the msi_iova(s)
from the array and pass in properly down to __pci_enable_msi/msix_range().
Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
---
drivers/pci/msi/api.c | 113 ++++++++++++++++++++++++++----------------
1 file changed, 70 insertions(+), 43 deletions(-)
diff --git a/drivers/pci/msi/api.c b/drivers/pci/msi/api.c
index 99ade7f69cd4..dff3d7350b38 100644
--- a/drivers/pci/msi/api.c
+++ b/drivers/pci/msi/api.c
@@ -204,6 +204,72 @@ void pci_disable_msix(struct pci_dev *dev)
}
EXPORT_SYMBOL(pci_disable_msix);
+static int __pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,
+ unsigned int max_vecs, unsigned int flags,
+ struct irq_affinity *affd,
+ dma_addr_t *msi_iovas)
+{
+ struct irq_affinity msi_default_affd = {0};
+ int nvecs = -ENOSPC;
+
+ if (flags & PCI_IRQ_AFFINITY) {
+ if (!affd)
+ affd = &msi_default_affd;
+ } else {
+ if (WARN_ON(affd))
+ affd = NULL;
+ }
+
+ if (flags & PCI_IRQ_MSIX) {
+ struct msix_entry *entries = NULL;
+
+ if (msi_iovas) {
+ int count = max_vecs - min_vecs + 1;
+ int i;
+
+ entries = kcalloc(max_vecs - min_vecs + 1,
+ sizeof(*entries), GFP_KERNEL);
+ if (!entries)
+ return -ENOMEM;
+ for (i = 0; i < count; i++) {
+ entries[i].entry = i;
+ entries[i].iova = msi_iovas[i];
+ }
+ }
+
+ nvecs = __pci_enable_msix_range(dev, entries, min_vecs,
+ max_vecs, affd, flags);
+ kfree(entries);
+ if (nvecs > 0)
+ return nvecs;
+ }
+
+ if (flags & PCI_IRQ_MSI) {
+ nvecs = __pci_enable_msi_range(dev, min_vecs, max_vecs, affd,
+ msi_iovas ? *msi_iovas :
+ PHYS_ADDR_MAX);
+ if (nvecs > 0)
+ return nvecs;
+ }
+
+ /* use INTx IRQ if allowed */
+ if (flags & PCI_IRQ_INTX) {
+ if (min_vecs == 1 && dev->irq) {
+ /*
+ * Invoke the affinity spreading logic to ensure that
+ * the device driver can adjust queue configuration
+ * for the single interrupt case.
+ */
+ if (affd)
+ irq_create_affinity_masks(1, affd);
+ pci_intx(dev, 1);
+ return 1;
+ }
+ }
+
+ return nvecs;
+}
+
/**
* pci_alloc_irq_vectors() - Allocate multiple device interrupt vectors
* @dev: the PCI device to operate on
@@ -235,8 +301,8 @@ EXPORT_SYMBOL(pci_disable_msix);
int pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,
unsigned int max_vecs, unsigned int flags)
{
- return pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,
- flags, NULL);
+ return __pci_alloc_irq_vectors(dev, min_vecs, max_vecs,
+ flags, NULL, NULL);
}
EXPORT_SYMBOL(pci_alloc_irq_vectors);
@@ -256,47 +322,8 @@ int pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,
unsigned int max_vecs, unsigned int flags,
struct irq_affinity *affd)
{
- struct irq_affinity msi_default_affd = {0};
- int nvecs = -ENOSPC;
-
- if (flags & PCI_IRQ_AFFINITY) {
- if (!affd)
- affd = &msi_default_affd;
- } else {
- if (WARN_ON(affd))
- affd = NULL;
- }
-
- if (flags & PCI_IRQ_MSIX) {
- nvecs = __pci_enable_msix_range(dev, NULL, min_vecs, max_vecs,
- affd, flags);
- if (nvecs > 0)
- return nvecs;
- }
-
- if (flags & PCI_IRQ_MSI) {
- nvecs = __pci_enable_msi_range(dev, min_vecs, max_vecs,
- affd, PHYS_ADDR_MAX);
- if (nvecs > 0)
- return nvecs;
- }
-
- /* use INTx IRQ if allowed */
- if (flags & PCI_IRQ_INTX) {
- if (min_vecs == 1 && dev->irq) {
- /*
- * Invoke the affinity spreading logic to ensure that
- * the device driver can adjust queue configuration
- * for the single interrupt case.
- */
- if (affd)
- irq_create_affinity_masks(1, affd);
- pci_intx(dev, 1);
- return 1;
- }
- }
-
- return nvecs;
+ return __pci_alloc_irq_vectors(dev, min_vecs, max_vecs,
+ flags, affd, NULL);
}
EXPORT_SYMBOL(pci_alloc_irq_vectors_affinity);
--
2.43.0
next prev parent reply other threads:[~2024-11-09 5:49 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-09 5:48 [PATCH RFCv1 0/7] vfio: Allow userspace to specify the address for each MSI vector Nicolin Chen
2024-11-09 5:48 ` [PATCH RFCv1 1/7] genirq/msi: Allow preset IOVA in struct msi_desc for MSI doorbell address Nicolin Chen
2024-11-09 5:48 ` [PATCH RFCv1 2/7] irqchip/gic-v3-its: Bypass iommu_cookie if desc->msi_iova is preset Nicolin Chen
2024-11-09 5:48 ` [PATCH RFCv1 3/7] PCI/MSI: Pass in msi_iova to msi_domain_insert_msi_desc Nicolin Chen
2024-11-09 5:48 ` [PATCH RFCv1 4/7] PCI/MSI: Allow __pci_enable_msi_range to pass in iova Nicolin Chen
2024-11-11 9:30 ` Andy Shevchenko
2024-11-09 5:48 ` Nicolin Chen [this message]
2024-11-11 9:33 ` [PATCH RFCv1 5/7] PCI/MSI: Extract a common __pci_alloc_irq_vectors function Andy Shevchenko
2024-11-09 5:48 ` [PATCH RFCv1 6/7] PCI/MSI: Add pci_alloc_irq_vectors_iovas helper Nicolin Chen
2024-11-11 9:34 ` Andy Shevchenko
2024-11-12 22:14 ` Nicolin Chen
2024-11-09 5:48 ` [PATCH RFCv1 7/7] vfio/pci: Allow preset MSI IOVAs via VFIO_IRQ_SET_ACTION_PREPARE Nicolin Chen
2024-11-11 13:09 ` [PATCH RFCv1 0/7] vfio: Allow userspace to specify the address for each MSI vector Robin Murphy
2024-11-11 14:14 ` Marc Zyngier
2024-11-12 22:13 ` Nicolin Chen
2024-11-12 21:54 ` Nicolin Chen
2024-11-13 1:34 ` Jason Gunthorpe
2024-11-13 21:11 ` Alex Williamson
2024-11-14 15:35 ` Robin Murphy
2024-11-20 13:17 ` Eric Auger
2024-11-20 14:03 ` Jason Gunthorpe
2024-11-28 11:15 ` Thomas Gleixner
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