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From: Lux Aliaga <they@mint.lgbt>
To: Konrad Dybcio <konrad.dybcio@linaro.org>,
	Andy Gross <agross@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/4] arm64: dts: qcom: sm6125: Add UFS nodes
Date: Thu, 15 Dec 2022 13:56:42 -0300	[thread overview]
Message-ID: <0c53ff07-8cf4-3e80-97fc-67dd2f2612f9@mint.lgbt> (raw)
In-Reply-To: <875bd0a8-fc08-1d19-2c75-65713d9d2317@linaro.org>

On 15/12/2022 13:18, Konrad Dybcio wrote:

> On 15.12.2022 17:12, Lux Aliaga wrote:
>> Adds a UFS host controller node and its corresponding PHY to
>> the sm6125 platform.
>>
>> Signed-off-by: Lux Aliaga <they@mint.lgbt>
>> ---
>>   arch/arm64/boot/dts/qcom/sm6125.dtsi | 66 ++++++++++++++++++++++++++++
>>   1 file changed, 66 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
>> index 7e25a4f85594..6d4534c7a2fe 100644
>> --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
>> @@ -508,6 +508,72 @@ sdhc_2: mmc@4784000 {
>>   			status = "disabled";
>>   		};
>>   
>> +		ufs_mem_hc: ufs@4804000 {
>> +			compatible = "qcom,sm6125-ufshc", "qcom,ufshc", "jedec,ufs-2.0";
>> +			reg = <0x04804000 0x3000>, <0x04810000 0x8000>;
>> +			reg-names = "std", "ice";
>> +			interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
>> +			phys = <&ufs_mem_phy_lanes>;
>> +			phy-names = "ufsphy";
>> +			lanes-per-direction = <1>;
>> +			#reset-cells = <1>;
>> +			resets = <&gcc GCC_UFS_PHY_BCR>;
>> +			reset-names = "rst";
>> +
>> +			clock-names = "core_clk",
>> +				"bus_aggr_clk",
>> +				"iface_clk",
>> +				"core_clk_unipro",
>> +				"ref_clk",
>> +				"tx_lane0_sync_clk",
>> +				"rx_lane0_sync_clk",
>> +				"ice_core_clk";
>> +			clocks = <&gcc GCC_UFS_PHY_AXI_CLK>,
>> +				<&gcc GCC_SYS_NOC_UFS_PHY_AXI_CLK>,
>> +				<&gcc GCC_UFS_PHY_AHB_CLK>,
>> +				<&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>,
>> +				<&rpmcc RPM_SMD_XO_CLK_SRC>,
>> +				<&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
>> +				<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
>> +				<&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
>> +			freq-table-hz = <50000000 240000000>,
>> +				<0 0>,
>> +				<0 0>,
>> +				<37500000 150000000>,
>> +				<0 0>,
>> +				<0 0>,
>> +				<0 0>,
>> +				<75000000 300000000>;
> The indentation is wrong. Make sure your tab size is set to 8
> and all the <> entries align with the first one.
Should I do this with clocks and clock-names too?

-- 
Lux Aliaga
https://nixgoat.me/


  reply	other threads:[~2022-12-15 16:57 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-15 16:12 [PATCH v2 1/4] dt-bindings: ufs: qcom: Add SM6125 compatible string Lux Aliaga
2022-12-15 16:12 ` [PATCH v2 2/4] arm64: dts: qcom: sm6125: Add UFS nodes Lux Aliaga
2022-12-15 16:18   ` Konrad Dybcio
2022-12-15 16:56     ` Lux Aliaga [this message]
2022-12-15 18:02       ` Konrad Dybcio
2022-12-15 16:12 ` [PATCH v2 3/4] dt-bindings: arm: qcom: Document xiaomi,laurel-sprout board Lux Aliaga
2022-12-15 16:12 ` [PATCH v2 4/4] arm64: dts: qcom: sm6125: Initial support for xiaomi-laurel-sprout Lux Aliaga
2022-12-15 16:18   ` Lux Aliaga
2022-12-15 16:21   ` Konrad Dybcio

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