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Wed, 4 Jun 2025 04:38:56 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ThreadId: Tbb2e10097ecee1e7 Date: Wed, 04 Jun 2025 10:38:20 +0200 From: "Arnd Bergmann" To: "Eric Biggers" , linux-kernel@vger.kernel.org Cc: linux-crypto@vger.kernel.org, "Ard Biesheuvel" , "Alexandre Torgue" , "Fabien Dessenne" , "Lionel DEBIEVE" , "Maxime Coquelin" , linux-stm32@st-md-mailman.stormreply.com Message-Id: <0c760b4f-4f52-4384-b663-3b08e4f92448@app.fastmail.com> In-Reply-To: <20250601193441.6913-1-ebiggers@kernel.org> References: <20250601193441.6913-1-ebiggers@kernel.org> Subject: Re: [PATCH v2] crypto: stm32 - remove crc32 and crc32c support Content-Type: text/plain Content-Transfer-Encoding: 7bit On Sun, Jun 1, 2025, at 21:34, Eric Biggers wrote: > From: Eric Biggers > > Remove the crc32 and crc32c support from the stm32 driver. Since it's > not wired up to the CRC library, almost no CRC user in the kernel can > actually be taking advantage of it, so it's effectively dead code. > > Support for this hardware could be migrated to the CRC library, but > there doesn't seem to be much point. This CRC engine is present only on > a couple older SoCs that lacked CRC instructions. > > Even on those SoCs, it's probably not worthwhile. This driver has to > deal with things like locking and runtime power management that do not > exist in software CRC code and are a source of bugs (as is clear from > the commit log) and add significant overhead to the processing of short > messages, which are common. The patch that originally added this driver > seemed to justify it based purely on a microbenchmark on Cortex-M7 on > long messages, not a real use case. These days, if this driver were to > be used at all it would likely be on Cortex-A7 instead. This CRC engine > is also not supported by QEMU, making the driver not easily testable. > > Acked-by: Ard Biesheuvel Acked-by: Arnd Bergmann As far as I can tell, the CRC unit was present on the original 24 MHz STM32F1 (Cortex-M3), where it probably had some merit, and later chips including the STM32MP1 (Cortex-A7) just incorporated the block for compatibility. Arnd