From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 91CD8C433DF for ; Tue, 19 May 2020 10:46:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6F6C920758 for ; Tue, 19 May 2020 10:46:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728793AbgESKqM (ORCPT ); Tue, 19 May 2020 06:46:12 -0400 Received: from foss.arm.com ([217.140.110.172]:58806 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728632AbgESKqL (ORCPT ); Tue, 19 May 2020 06:46:11 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BF79E101E; Tue, 19 May 2020 03:46:10 -0700 (PDT) Received: from [10.37.8.206] (unknown [10.37.8.206]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D7ABE3F68F; Tue, 19 May 2020 03:46:08 -0700 (PDT) Subject: Re: [PATCH V4 06/17] arm64/cpufeature: Introduce ID_MMFR5 CPU register To: anshuman.khandual@arm.com, linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, mark.rutland@arm.com, james.morse@arm.com, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org References: <1589881254-10082-1-git-send-email-anshuman.khandual@arm.com> <1589881254-10082-7-git-send-email-anshuman.khandual@arm.com> From: Suzuki K Poulose Message-ID: <0c9becaf-2bc6-e094-a3ee-7b67a5eb82cd@arm.com> Date: Tue, 19 May 2020 11:50:54 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <1589881254-10082-7-git-send-email-anshuman.khandual@arm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/19/2020 10:40 AM, Anshuman Khandual wrote: > This adds basic building blocks required for ID_MMFR5 CPU register which > provides information about the implemented memory model and memory > management support in AArch32 state. This is added per ARM DDI 0487F.a > specification. > > Cc: Catalin Marinas > Cc: Will Deacon > Cc: Marc Zyngier > Cc: Mark Rutland > Cc: James Morse > Cc: Suzuki K Poulose > Cc: kvmarm@lists.cs.columbia.edu > Cc: linux-arm-kernel@lists.infradead.org > Cc: linux-kernel@vger.kernel.org > > Suggested-by: Will Deacon > Signed-off-by: Anshuman Khandual Reviewed-by: Suzuki K Poulose