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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5ebccfb004fsm9514631a12.40.2025.03.26.06.39.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 26 Mar 2025 06:39:43 -0700 (PDT) Message-ID: <0ca929c6-6ff5-4ab0-8ebf-aed3cc5f350b@oss.qualcomm.com> Date: Wed, 26 Mar 2025 14:39:41 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 2/4] soc: qcom: llcc-qcom: Add support for LLCC V6 To: Melody Olvera , Bjorn Andersson , Konrad Dybcio , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Satya Durga Srinivasu Prabhala , Trilok Soni Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250324-sm8750_llcc_master-v3-0-2afd5c0fdbde@quicinc.com> <20250324-sm8750_llcc_master-v3-2-2afd5c0fdbde@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250324-sm8750_llcc_master-v3-2-2afd5c0fdbde@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: WRmIXzYS90z-AvYHai39TDkTuLGU10sR X-Proofpoint-GUID: WRmIXzYS90z-AvYHai39TDkTuLGU10sR X-Authority-Analysis: v=2.4 cv=QLZoRhLL c=1 sm=1 tr=0 ts=67e403a2 cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=Vs1iUdzkB0EA:10 a=COk6AnOGAAAA:8 a=cgwDF5ybabLtFIHcvScA:9 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-26_06,2025-03-26_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 priorityscore=1501 adultscore=0 malwarescore=0 phishscore=0 mlxlogscore=999 mlxscore=0 clxscore=1015 lowpriorityscore=0 suspectscore=0 bulkscore=0 spamscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2503260083 On 3/24/25 9:29 PM, Melody Olvera wrote: > Add support for LLCC V6. V6 adds several additional usecase IDs, > rearrages several registers and offsets, and supports slice IDs > over 31, so add a new function for programming LLCC V6. > > Signed-off-by: Melody Olvera > --- [...] > + > + if (config->parent_slice_id && config->fixed_size) { > + attr2_val |= FIELD_PREP(ATTR2_PARENT_SCID_MASK, config->parent_slice_id); > + attr2_val |= ATTR2_IN_A_GROUP_MASK; > + } This is fragile if parent_slice_id == 0, but let's say this is not an issue for now.. > + > + attr3_val = MAX_CAP_TO_BYTES(config->max_cap); > + attr3_val /= drv_data->num_banks; > + attr3_val >>= CACHE_LINE_SIZE_SHIFT; > + > + ret = regmap_write(drv_data->bcast_regmap, attr0_cfg, attr0_val); > + if (ret) > + return ret; > + > + ret = regmap_write(drv_data->bcast_regmap, attr1_cfg, attr1_val); > + if (ret) > + return ret; > + > + ret = regmap_write(drv_data->bcast_regmap, attr2_cfg, attr2_val); > + if (ret) > + return ret; > + > + ret = regmap_write(drv_data->bcast_regmap, attr3_cfg, attr3_val); > + if (ret) > + return ret; > + > + slice_offset = config->slice_id % 32; > + reg_offset = (config->slice_id / 32) * 4; > + > + wren = config->write_scid_en << slice_offset;If I'm reading the wrappers right, you should be able to drop both the shifting and intermediate variables with regmap_assign_bits() Looks good otherwise Konrad