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Mon, 12 Oct 2026 18:40:45 +0000 Message-ID: <0ce0ac49-d0aa-42c5-b0a3-08b09b9f130b@intel.com> Date: Mon, 12 Oct 2026 11:40:43 -0700 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 1/3] x86/resctrl: Fix ABMC counter programming To: Babu Moger , , CC: , , , , , , , , , , , , , , , References: <94c453ca762ef0c32680ac1163099c30866a99c0.1791589412.git.babu.moger@amd.com> Content-Language: en-US From: Reinette Chatre In-Reply-To: <94c453ca762ef0c32680ac1163099c30866a99c0.1791589412.git.babu.moger@amd.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: MW4PR04CA0214.namprd04.prod.outlook.com (2603:10b6:303:87::9) To SJ2PR11MB8370.namprd11.prod.outlook.com (2603:10b6:a03:540::20) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ2PR11MB8370:EE_|DS6PR11MB745858:EE_ X-MS-Office365-Filtering-Correlation-Id: f6496ff0-9802-4398-8945-08df289053cf X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|23010399003|376014|7416014|56012099006|11063799006|4143699003|261009223027099003|10067099003|22082099003|18002099003|6133799003|3023799007; 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MSR_IA32_L3_QOS_ABMC_CFG.cntr_id selects the > counter the configuration applies to. The number of counters a platform > supports (the number of possible values written to > MSR_IA32_L3_QOS_ABMC_CFG.cntr_id) is enumerated separately via CPUID. > > On platforms that enumerate more than 32 counters, the current 5-bit > encoding truncates the counter ID and misprograms ABMC. > > The AMD64 Architecture Programmer's Manual [1], available from [2], has > been updated to widen MSR_IA32_L3_QOS_ABMC_CFG.cntr_id from 5 bits to 12 > bits (the published revision 3.41 does not yet reflect this; a future > revision will). The CPUID enumeration reports the maximum counter ID in a > 16-bit field and may therefore report more counters than a 12-bit > MSR_IA32_L3_QOS_ABMC_CFG.cntr_id can address. > > Widen MSR_IA32_L3_QOS_ABMC_CFG.cntr_id to 12 bits to match the > architecture. Cap the enumerated counter count at BIT(12) so every counter > ID used by resctrl can be written to MSR_IA32_L3_QOS_ABMC_CFG.cntr_id > without truncation. > > [1] AMD64 Architecture Programmer's Manual Volume 2: System Programming, > Publication #24593, Revision 3.41, Section 19.3.3.3 "Assignable > Bandwidth Monitoring (ABMC)" > > Fixes: 84ecefb76674 ("x86/resctrl: Add data structures and definitions for ABMC assignment") > Signed-off-by: Babu Moger > Cc: stable@vger.kernel.org > Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 # [2] > --- Reviewed-by: Reinette Chatre Reinette