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Sat, 22 Nov 2025 06:22:00 -0800 (PST) Message-ID: <0d21cf40-3614-48f4-86e0-69c7a87458e9@tuxon.dev> Date: Sat, 22 Nov 2025 16:21:59 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] ARM: dts: Add support for pcb8385 To: Horatiu Vultur , robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, nicolas.ferre@microchip.com, alexandre.belloni@bootlin.com, wsa+renesas@sang-engineering.com, romain.sioen@microchip.com Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20251117125709.102013-1-horatiu.vultur@microchip.com> <20251117125709.102013-3-horatiu.vultur@microchip.com> From: Claudiu Beznea Content-Language: en-US In-Reply-To: <20251117125709.102013-3-horatiu.vultur@microchip.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi, Horatiu, On 11/17/25 14:57, Horatiu Vultur wrote: > Add basic support for pcb8385 [1]. It is a modular board which allows > to add different daughter cards on which there are different PHYs. > This adds support for UART, LEDs and I2C. > > [1] https://www.microchip.com/en-us/development-tool/ev83e85a > > Signed-off-by: Horatiu Vultur > --- > arch/arm/boot/dts/microchip/Makefile | 3 +- > .../boot/dts/microchip/lan966x-pcb8385.dts | 137 ++++++++++++++++++ > 2 files changed, 139 insertions(+), 1 deletion(-) > create mode 100644 arch/arm/boot/dts/microchip/lan966x-pcb8385.dts > > diff --git a/arch/arm/boot/dts/microchip/Makefile b/arch/arm/boot/dts/microchip/Makefile > index 79cd38fdc7dab..08986c24a4700 100644 > --- a/arch/arm/boot/dts/microchip/Makefile > +++ b/arch/arm/boot/dts/microchip/Makefile > @@ -102,4 +102,5 @@ dtb-$(CONFIG_SOC_LAN966) += \ > lan966x-kontron-kswitch-d10-mmt-8g.dtb \ > lan966x-pcb8290.dtb \ > lan966x-pcb8291.dtb \ > - lan966x-pcb8309.dtb > + lan966x-pcb8309.dtb \ > + lan966x-pcb8385.dtb > diff --git a/arch/arm/boot/dts/microchip/lan966x-pcb8385.dts b/arch/arm/boot/dts/microchip/lan966x-pcb8385.dts > new file mode 100644 > index 0000000000000..f4817cee93436 > --- /dev/null > +++ b/arch/arm/boot/dts/microchip/lan966x-pcb8385.dts > @@ -0,0 +1,137 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * lan966x-pcb8385.dts - Device Tree file for PCB8385 > + */ > +/dts-v1/; > + > +#include "lan966x.dtsi" > +#include "dt-bindings/phy/phy-lan966x-serdes.h" > + > +/ { > + model = "Microchip EVB - LAN9668"; > + compatible = "microchip,lan9668-pcb8385", "microchip,lan9668", "microchip,lan966"; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + aliases { > + serial0 = &usart3; > + }; > + > + gpio-restart { > + compatible = "gpio-restart"; > + gpios = <&gpio 59 GPIO_ACTIVE_LOW>; > + open-source; > + priority = <200>; > + }; > + > + leds { > + compatible = "gpio-leds"; > + > + led-p1-green { > + label = "cu0:green"; > + gpios = <&sgpio_out 2 0 GPIO_ACTIVE_LOW>; > + default-state = "off"; > + linux,default-trigger = "e200413c.mdio-mii:01:link"; > + }; > + > + led-p1-yellow { > + label = "cu0:yellow"; > + gpios = <&sgpio_out 2 1 GPIO_ACTIVE_LOW>; > + default-state = "off"; > + }; > + > + led-p2-green { > + label = "cu1:green"; > + gpios = <&sgpio_out 3 0 GPIO_ACTIVE_LOW>; > + default-state = "off"; > + linux,default-trigger = "e200413c.mdio-mii:02:link"; > + }; > + > + led-p2-yellow { > + label = "cu1:yellow"; > + gpios = <&sgpio_out 3 1 GPIO_ACTIVE_LOW>; > + default-state = "off"; > + }; > + }; > +}; > + > +&aes { > + status = "disabled"; /* Reserved by secure OS */ > +}; > + > +&gpio { > + fc0_b_pins: fc0-b-pins { > + /* SCL, SDA */ > + pins = "GPIO_25", "GPIO_26"; > + function = "fc0_b"; > + }; > + > + fc3_b_pins: fc3-b-pins { > + /* RX, TX */ > + pins = "GPIO_52", "GPIO_53"; > + function = "fc3_b"; > + }; > + > + sgpio_a_pins: sgpio-a-pins { > + /* SCK, D0, D1, LD */ > + pins = "GPIO_32", "GPIO_33", "GPIO_34", "GPIO_35"; > + function = "sgpio_a"; > + }; > +}; > + > +&flx0 { This would go after aes node to have them alphanumerically sorted. I can handled it while applying, if any. > + atmel,flexcom-mode = ; > + status = "okay"; > + > + i2c0: i2c@600 { > + pinctrl-0 = <&fc0_b_pins>; > + pinctrl-names = "default"; > + dmas = <0>, <0>; > + i2c-analog-filter; > + i2c-digital-filter; > + i2c-digital-filter-width-ns = <35>; > + i2c-sda-hold-time-ns = <1500>; > + status = "okay"; > + }; > +}; > + > +&flx3 { > + atmel,flexcom-mode = ; > + status = "okay"; > + > + usart3: serial@200 { > + pinctrl-0 = <&fc3_b_pins>; > + pinctrl-names = "default"; > + status = "okay"; > + }; > +}; > + > +&i2c0 { > + eeprom@54 { > + compatible = "atmel,24c01"; > + reg = <0x54>; > + status = "okay"; > + }; > + > + eeprom@55 { > + compatible = "atmel,24c01"; > + reg = <0x55>; > + status = "okay"; > + }; Any reason for not keeping these above under "i2c0: i2c@600 {" ? Thank you, Claudiu > +}; > + > +&sgpio { > + pinctrl-0 = <&sgpio_a_pins>; > + pinctrl-names = "default"; > + microchip,sgpio-port-ranges = <0 3>; > + status = "okay"; > + > + gpio@0 { > + ngpios = <64>; > + }; > + gpio@1 { > + ngpios = <64>; > + }; > +};