Re: [PATCH] hwmon: (k10temp) Fix model id range of Zen5 Turin

[Guenter Roeck <linux@roeck-us.net>]

On 9/10/26 13:07, Rong Zhang wrote:
> Hi Guenter,
> 
> Thanks for your review.
> 
> 
> 于 2026年9月11日 GMT+08:00 03:00:13，Guenter Roeck <linux@roeck-us.net> 写道：
>> On 9/10/26 11:39, Rong Zhang wrote:
>>> Model 20h-2Fh are mobile processors with single CCD. For example, model
>>> 24h is Strix Point, i.e., Ryzen AI 7 (PRO) (H/HX) 360/365/370.
>>>
>>> Including mobile processors in the model id range of Zen5 Turin
>>> processors leads to bogus reporting:
>>>
>>>     k10temp-pci-00c3
>>>     Adapter: PCI adapter
>>>     Tctl:         +54.1°C
>>>     Tccd4:       +148.6°C
>>>     Tccd6:       +148.4°C
>>>     Tccd7:       +149.1°C
>>>     Tccd8:       +149.2°C
>>>     Tccd9:       +149.2°C
>>>     Tccd12:      +149.1°C
>>>     Tccd14:       +22.0°C
>>>     Tccd15:       +22.0°C
>>>     Tccd16:       +22.0°C
>>>
>>> Fix it by removing the said range.
>>>
>>> Fixes: 8440d5aca227 ("hwmon: (k10temp) Add per-CCD temperature monitoring for Zen5 Turin")
>>> Signed-off-by: Rong Zhang <i@rong.moe>
>>> ---
>>>    drivers/hwmon/k10temp.c | 2 +-
>>>    1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c
>>> index 75a45010d687..3e7e63edc6a3 100644
>>> --- a/drivers/hwmon/k10temp.c
>>> +++ b/drivers/hwmon/k10temp.c
>>> @@ -523,7 +523,7 @@ static int k10temp_probe(struct pci_dev *pdev, const struct pci_device_id *id)
>>>    		}
>>>    	} else if (boot_cpu_data.x86 == 0x1a) {
>>>    		switch (boot_cpu_data.x86_model) {
>>> -		case 0x00 ... 0x2f:	/* Zen5 Turin */
>>> +		case 0x00 ... 0x1f:	/* Zen5 Turin */
>>
>> Doesn't that drop _all_ CCD temperature reporting for those chips ?
> 
> Yes, it's intentional. Mobile processors don't support Tccd at all, and
> Tctl is the only available temperature metric on such processors.

Is that documented somewhere ?

> In the commit message there is an example of bogus Tccd reporting.
> 
That does not necessarily mean that CCD reporting is not supported.
It might just mean that those processors use a different CCD offset.

Thanks,
Guenter