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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-61500a5728bsm2856429a12.23.2025.07.28.02.18.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 28 Jul 2025 02:18:22 -0700 (PDT) Message-ID: <0d99a9e8-5ad6-4826-9fb7-753724dc53ad@oss.qualcomm.com> Date: Mon, 28 Jul 2025 11:18:20 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] leds: flash: leds-qcom-flash: update torch current clamp setting To: Fenglin Wu , kernel@oss.qualcomm.com, Lee Jones , Pavel Machek , Fenglin Wu Cc: Subbaraman Narayanamurthy , linux-leds@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250725-fix-torch-clamp-issue-v1-0-4cf3ebaa4c67@oss.qualcomm.com> <20250725-fix-torch-clamp-issue-v1-1-4cf3ebaa4c67@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzI4MDA2OCBTYWx0ZWRfX1sInNDL5XBvo GmJyrF8gCzs0CxkL9MgVmZ9t/UIzZZYHee7w/u/DcRgMNtNVo+TJe0vO62iVUEzTk6A4F0fjm7i kLuMT49cC5v1RHu0tN/yWvFdg/rqIo2yg2nYT1VplofBPVbBR95Uuk8RK8H0hqfand6aZnSv+4G lebNl9UAbFYcxxvFPIN6w9nskaDkKorUEjytVT7NvNMtQc3AFiDzQyLj1gGbAkkLo6c+39njmEI 5SD6DIa3jHT+IyIxWWXRZnr3+UwUgEFfbgD9luPQhzkD3HUe+d2g3p8tWxDY9R0qRnOo+tHdElh rFlzlgZMo3Fz0WAm/jU7ok9ugh8j+zxQGa1i7npqhl/3NbYudr/ht1FuFNt4sGVGeN0XURnCL7n Hq5HDTMopk9HdnNvHSVMwtUZ5DCEiXRyFr8vfnKmAkL9YWmy68DebzuezL3PTw19KeX9es7y X-Authority-Analysis: v=2.4 cv=JKw7s9Kb c=1 sm=1 tr=0 ts=68874061 cx=c_pps a=mPf7EqFMSY9/WdsSgAYMbA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=EUspDBNiAAAA:8 a=7tzVVK5p8Zpjar64nkwA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=dawVfQjAaf238kedN5IG:22 X-Proofpoint-ORIG-GUID: rT9p4f2aliWBVRq4oZmMJZEjw9IJ1QyG X-Proofpoint-GUID: rT9p4f2aliWBVRq4oZmMJZEjw9IJ1QyG X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-28_03,2025-07-24_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxscore=0 priorityscore=1501 spamscore=0 suspectscore=0 phishscore=0 lowpriorityscore=0 bulkscore=0 malwarescore=0 clxscore=1015 mlxlogscore=999 adultscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507280068 On 7/28/25 4:27 AM, Fenglin Wu wrote: > > On 7/25/2025 8:37 PM, Konrad Dybcio wrote: >> On 7/25/25 12:04 PM, 'Fenglin Wu via B4 Relay' via kernel wrote: >>> From: Fenglin Wu >>> >>> There is a register to clamp the flash current per LED channel when >>> safety timer is disabled. It needs to be updated according to the >>> maximum torch LED current setting to ensure the torch current won't >>> be clamped unexpectedly. >>> >>> Fixes: 96a2e242a5dc ("leds: flash: Add driver to support flash LED module in QCOM PMICs") >>> Signed-off-by: Fenglin Wu >>> --- >>>   drivers/leds/flash/leds-qcom-flash.c | 16 +++++++++++++--- >>>   1 file changed, 13 insertions(+), 3 deletions(-) >>> >>> diff --git a/drivers/leds/flash/leds-qcom-flash.c b/drivers/leds/flash/leds-qcom-flash.c >>> index 89cf5120f5d55bbb7e24faa8c3a946416f8fed46..9c2e41cfddcf2d50d5a633cb157084371a631d74 100644 >>> --- a/drivers/leds/flash/leds-qcom-flash.c >>> +++ b/drivers/leds/flash/leds-qcom-flash.c >>> @@ -1,6 +1,6 @@ >>>   // SPDX-License-Identifier: GPL-2.0-only >>>   /* >>> - * Copyright (c) 2022, 2024 Qualcomm Innovation Center, Inc. All rights reserved. >>> + * Copyright (c) 2022, 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. >>>    */ >>>     #include >>> @@ -111,6 +111,7 @@ enum { >>>       REG_IRESOLUTION, >>>       REG_CHAN_STROBE, >>>       REG_CHAN_EN, >>> +    REG_TORCH_CLAMP, >> This is not the name of this register on at least PM8150L > The register is referred to as 'TIMER_DISA_MITIGATION_CLAMP' in the documentation. 'TIMER_DISA' indicates the flash module operating in torch mode. We can remove 'MITIGATION' to create a shorter name for the enum.>> >>>       REG_THERM_THRSH1, >>>       REG_THERM_THRSH2, >>>       REG_THERM_THRSH3, >>> @@ -127,6 +128,7 @@ static const struct reg_field mvflash_3ch_regs[REG_MAX_COUNT] = { >>>       REG_FIELD(0x47, 0, 5),                  /* iresolution    */ >>>       REG_FIELD_ID(0x49, 0, 2, 3, 1),         /* chan_strobe    */ >>>       REG_FIELD(0x4c, 0, 2),                  /* chan_en    */ >>> +    REG_FIELD(0xec, 0, 6),            /* torch_clamp    */ >> Please keep it sorted by address > I need to keep the 'therm_thrsh1/2/3' register fields at the end of this array because 'mvflash_4ch_regs' doesn't include a 'therm_thrsh3' register. Placing the 'therm_thrshx' registers in the middle would require creating a placeholder, which I couldn't figure out how to do effectively. Do you have any suggestions? Designated initializers (i.e. [REG_CHAN_EN] = REG_FIELD(...),) Konrad