From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933365AbcIEKW7 (ORCPT ); Mon, 5 Sep 2016 06:22:59 -0400 Received: from regular1.263xmail.com ([211.150.99.134]:34695 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932444AbcIEKWz (ORCPT ); Mon, 5 Sep 2016 06:22:55 -0400 X-263anti-spam: KSV:0;BIG:0;ABS:1;DNS:0;ATT:0;SPF:S; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 1 X-SKE-CHECKED: 1 X-ADDR-CHECKED: 0 X-RL-SENDER: andy.yan@rock-chips.com X-FST-TO: linux-arm-kernel@lists.infradead.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: andy.yan@rock-chips.com X-UNIQUE-TAG: <449f0a19f3d244a2f58b720f3b32b24f> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [PATCH 3/4] include: dt-bindings: Add more GPIO bank and index definition for rockchip pinctrl To: Heiko Stuebner References: <1472977937-758-1-git-send-email-andy.yan@rock-chips.com> <1472978130-919-1-git-send-email-andy.yan@rock-chips.com> <3544284.90s5nXbktR@phil> Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, linux-arm-kernel@lists.infradead.org From: Andy Yan Message-ID: <0dbac4cd-7f67-5052-16e6-463896bf5929@rock-chips.com> Date: Mon, 5 Sep 2016 18:22:46 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.2.0 MIME-Version: 1.0 In-Reply-To: <3544284.90s5nXbktR@phil> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Heiko: On 2016年09月05日 17:33, Heiko Stuebner wrote: > Hi Andy, > > Am Sonntag, 4. September 2016, 16:35:30 CEST schrieb Andy Yan: >> There are 8 gpio banks on RK3288, so add the missing >> RK_GPIO7 and RK_GPIO8. Also add gpio index definition >> to make it easier to description GPIO in dts. >> >> Signed-off-by: Andy Yan > I tend to disagree here. > > I consider the bank defines RK_GPIOx to be deprecated and highly discourage > them being used in new boards. They only encode the same number again (2 -> > RK_GPIO2 etc) and therefore don't bring any useful addition over using the > bank number directly. > > Slightly similar argument for the per-pin defines. While the external pins are > described in the A/B/C/Dx notation for pinmux purposes, the gpio controllers > on top use a regular 0-31 numbering. Also you cannot name constants generic > GPIO_x, simply because that may conflict with other overly generic constant > names. > > So I'm not yet convinced that these improve readability, but they would > definitly need a RK_* prefix to make them specific. > > > Heiko I consider for a people who doesn't familiar with rockchip pinctrl, He may don't know what does these number 2/4/17....stands for in the dts like rockchip,pins = <2 17 RK_FUNC_GPIO &pcfg_pull_up>. But if we use meaningful macro here like : rockchip,pins = , I think it easier to tell people this GPIO is GPIO_C0 of BNAK2. Especially all the GPIOs in rockchip based schematic are described as GPIOn_A/B/C/Dx. And it is also easier for people to directly use a macro stands for 0~32 than translating A/B/C/Dx from the schematic to 0~32. >> --- >> >> include/dt-bindings/pinctrl/rockchip.h | 35 >> ++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) >> >> diff --git a/include/dt-bindings/pinctrl/rockchip.h >> b/include/dt-bindings/pinctrl/rockchip.h index 743e66a..fd35350 100644 >> --- a/include/dt-bindings/pinctrl/rockchip.h >> +++ b/include/dt-bindings/pinctrl/rockchip.h >> @@ -24,6 +24,41 @@ >> #define RK_GPIO3 3 >> #define RK_GPIO4 4 >> #define RK_GPIO6 6 >> +#define RK_GPIO7 7 >> +#define RK_GPIO8 8 >> + >> +#define GPIO_A0 0 >> +#define GPIO_A1 1 >> +#define GPIO_A2 2 >> +#define GPIO_A3 3 >> +#define GPIO_A4 4 >> +#define GPIO_A5 5 >> +#define GPIO_A6 6 >> +#define GPIO_A7 7 >> +#define GPIO_B0 8 >> +#define GPIO_B1 9 >> +#define GPIO_B2 10 >> +#define GPIO_B3 11 >> +#define GPIO_B4 12 >> +#define GPIO_B5 13 >> +#define GPIO_B6 14 >> +#define GPIO_B7 15 >> +#define GPIO_C0 16 >> +#define GPIO_C1 17 >> +#define GPIO_C2 18 >> +#define GPIO_C3 19 >> +#define GPIO_C4 20 >> +#define GPIO_C5 21 >> +#define GPIO_C6 22 >> +#define GPIO_C7 23 >> +#define GPIO_D0 24 >> +#define GPIO_D1 25 >> +#define GPIO_D2 26 >> +#define GPIO_D3 27 >> +#define GPIO_D4 28 >> +#define GPIO_D5 29 >> +#define GPIO_D6 30 >> +#define GPIO_D7 31 >> >> #define RK_FUNC_GPIO 0 >> #define RK_FUNC_1 1 > > > >