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From: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
To: "Rob Herring" <robh+dt@kernel.org>,
	"Andreas Färber" <afaerber@suse.de>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>
Cc: linux-actions@lists.infradead.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH 03/11] arm: dts: owl-s500: Set UART clock refs from CMU
Date: Wed, 17 Jun 2020 19:48:03 +0300	[thread overview]
Message-ID: <0dcd4186d4ecc420ce382977dd6624f6e63fefc7.1592407030.git.cristian.ciocaltea@gmail.com> (raw)
In-Reply-To: <cover.1592407030.git.cristian.ciocaltea@gmail.com>

Enable using Clock Management Unit clocks for every UART node
of the Actions Semi S500 SoC.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
---
 arch/arm/boot/dts/owl-s500.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot/dts/owl-s500.dtsi
index 5d5ad9db549b..ac3d04c75dd5 100644
--- a/arch/arm/boot/dts/owl-s500.dtsi
+++ b/arch/arm/boot/dts/owl-s500.dtsi
@@ -131,6 +131,7 @@ uart0: serial@b0120000 {
 			compatible = "actions,s500-uart", "actions,owl-uart";
 			reg = <0xb0120000 0x2000>;
 			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_UART0>;
 			status = "disabled";
 		};
 
@@ -138,6 +139,7 @@ uart1: serial@b0122000 {
 			compatible = "actions,s500-uart", "actions,owl-uart";
 			reg = <0xb0122000 0x2000>;
 			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_UART1>;
 			status = "disabled";
 		};
 
@@ -145,6 +147,7 @@ uart2: serial@b0124000 {
 			compatible = "actions,s500-uart", "actions,owl-uart";
 			reg = <0xb0124000 0x2000>;
 			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_UART2>;
 			status = "disabled";
 		};
 
@@ -152,6 +155,7 @@ uart3: serial@b0126000 {
 			compatible = "actions,s500-uart", "actions,owl-uart";
 			reg = <0xb0126000 0x2000>;
 			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_UART3>;
 			status = "disabled";
 		};
 
@@ -159,6 +163,7 @@ uart4: serial@b0128000 {
 			compatible = "actions,s500-uart", "actions,owl-uart";
 			reg = <0xb0128000 0x2000>;
 			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_UART4>;
 			status = "disabled";
 		};
 
@@ -166,6 +171,7 @@ uart5: serial@b012a000 {
 			compatible = "actions,s500-uart", "actions,owl-uart";
 			reg = <0xb012a000 0x2000>;
 			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_UART5>;
 			status = "disabled";
 		};
 
@@ -173,6 +179,7 @@ uart6: serial@b012c000 {
 			compatible = "actions,s500-uart", "actions,owl-uart";
 			reg = <0xb012c000 0x2000>;
 			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_UART6>;
 			status = "disabled";
 		};
 
-- 
2.27.0


  parent reply	other threads:[~2020-06-17 16:48 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-17 16:48 [PATCH 00/11] Add CMU/RMU/DMA support for Actions Semi S500 SoCs Cristian Ciocaltea
2020-06-17 16:48 ` [PATCH 01/11] clk: actions: Fix h_clk for Actions S500 SoC Cristian Ciocaltea
2020-06-17 16:48 ` [PATCH 02/11] arm: dts: owl-s500: Add Clock Management Unit Cristian Ciocaltea
2020-06-17 16:48 ` Cristian Ciocaltea [this message]
2020-06-17 16:48 ` [PATCH 04/11] arm: dts: owl-s500-roseapplepi: Use UART clock from CMU Cristian Ciocaltea
2020-06-17 16:48 ` [PATCH 05/11] dt-bindings: clock: Add APB, DMAC, GPIO bindings for Actions S500 SoC Cristian Ciocaltea
2020-06-17 16:48 ` [PATCH 06/11] clk: actions: Add APB, DMAC, GPIO clock support " Cristian Ciocaltea
2020-06-17 16:48 ` [PATCH 07/11] arm: dts: owl-s500: Add DMA controller Cristian Ciocaltea
2020-06-17 16:48 ` [PATCH 08/11] dt-bindings: reset: Add binding constants for Actions S500 RMU Cristian Ciocaltea
2020-06-17 16:48 ` [PATCH 09/11] clk: actions: Add Actions S500 SoC Reset Management Unit support Cristian Ciocaltea
2020-06-22  8:12   ` Stephen Boyd
2020-06-22 12:23     ` Cristian Ciocaltea
2020-06-17 16:48 ` [PATCH 10/11] arm: dts: owl-s500: Add Reset Controller support Cristian Ciocaltea
2020-06-17 16:48 ` [PATCH 11/11] MAINTAINERS: Add reset binding entry for Actions Semi Owl SoCs Cristian Ciocaltea
     [not found] ` <159281361144.62212.15284914532690869405@swboyd.mtv.corp.google.com>
2020-06-22 12:18   ` [PATCH 00/11] Add CMU/RMU/DMA support for Actions Semi S500 SoCs Cristian Ciocaltea

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