From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.5 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E1CB7C49361 for ; Thu, 17 Jun 2021 08:22:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B8CB860FE5 for ; Thu, 17 Jun 2021 08:22:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230334AbhFQIZF (ORCPT ); Thu, 17 Jun 2021 04:25:05 -0400 Received: from szxga08-in.huawei.com ([45.249.212.255]:8251 "EHLO szxga08-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229842AbhFQIZC (ORCPT ); Thu, 17 Jun 2021 04:25:02 -0400 Received: from dggemv704-chm.china.huawei.com (unknown [172.30.72.55]) by szxga08-in.huawei.com (SkyGuard) with ESMTP id 4G5FKp5jXQz1BGTR; Thu, 17 Jun 2021 16:17:50 +0800 (CST) Received: from dggpemm500023.china.huawei.com (7.185.36.83) by dggemv704-chm.china.huawei.com (10.3.19.47) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Thu, 17 Jun 2021 16:22:53 +0800 Received: from [10.174.187.128] (10.174.187.128) by dggpemm500023.china.huawei.com (7.185.36.83) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2176.2; Thu, 17 Jun 2021 16:22:52 +0800 Subject: Re: [PATCH v6 1/4] KVM: arm64: Introduce cache maintenance callbacks for guest stage-2 To: Marc Zyngier CC: Will Deacon , Quentin Perret , Alexandru Elisei , , , , , Catalin Marinas , James Morse , Julien Thierry , Suzuki K Poulose , Gavin Shan , , , References: <20210616095200.38008-1-wangyanan55@huawei.com> <20210616095200.38008-2-wangyanan55@huawei.com> <87eed2lzcc.wl-maz@kernel.org> <8340be12-cc80-8c2a-3597-ecba05eaf35a@huawei.com> <87o8c4dikn.wl-maz@kernel.org> From: "wangyanan (Y)" Message-ID: <0dced974-b507-ce48-b89d-344d41a02418@huawei.com> Date: Thu, 17 Jun 2021 16:22:51 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.4.0 MIME-Version: 1.0 In-Reply-To: <87o8c4dikn.wl-maz@kernel.org> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US X-Originating-IP: [10.174.187.128] X-ClientProxiedBy: dggeme707-chm.china.huawei.com (10.1.199.103) To dggpemm500023.china.huawei.com (7.185.36.83) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2021/6/17 16:03, Marc Zyngier wrote: > On Thu, 17 Jun 2021 07:48:29 +0100, > "wangyanan (Y)" wrote: >> Hi Marc, >> >> On 2021/6/16 21:21, Marc Zyngier wrote: >>> Hi Yanan, >>> >>> On Wed, 16 Jun 2021 10:51:57 +0100, >>> Yanan Wang wrote: >>>> To prepare for performing guest CMOs in the fault handlers in pgtable.c, >>>> introduce two cache maintenance callbacks in struct kvm_pgtable_mm_ops. >>>> >>>> The new callbacks are specific for guest stage-2, so they will only be >>>> initialized in 'struct kvm_pgtable_mm_ops kvm_s2_mm_ops'. >>>> >>>> Signed-off-by: Yanan Wang >>>> --- >>>> arch/arm64/include/asm/kvm_pgtable.h | 7 +++++++ >>>> 1 file changed, 7 insertions(+) >>>> >>>> diff --git a/arch/arm64/include/asm/kvm_pgtable.h b/arch/arm64/include/asm/kvm_pgtable.h >>>> index c3674c47d48c..302eca32e0af 100644 >>>> --- a/arch/arm64/include/asm/kvm_pgtable.h >>>> +++ b/arch/arm64/include/asm/kvm_pgtable.h >>>> @@ -44,6 +44,11 @@ typedef u64 kvm_pte_t; >>>> * in the current context. >>>> * @virt_to_phys: Convert a virtual address mapped in the current context >>>> * into a physical address. >>>> + * @flush_dcache: Clean data cache for a guest page address range before >>>> + * creating the corresponding stage-2 mapping. >>> Please don't reintroduce the word 'flush'. We are really trying to >>> move away from it as it doesn't describe what we want to do. >> I agree with this. I intended to make the names short and laconic, but this >> missed the information about the callback's actual behaviors. >>> Here this >>> should be 'clean_invalidate_dcache' which, despite being a mouthful, >>> describe accurately what we expect it to do. >> Sure, I will change the name as you suggested. >>> The comment is also missing the invalidate part, and we shouldn't >>> assume that this is only used for S2 mapping. >> Ok, will refine the comment. I think something like"Clean and invalidate the >> date cache for the specified memory address range" may be generic enough. >>>> + * @flush_icache: Invalidate instruction cache for a guest page address >>>> + * range before creating or updating the corresponding >>>> + * stage-2 mapping. >>> Same thing here; this should be 'invalidate_icache', and the comment >>> cleaned up. >> Thanks, I will also correct this part. >> >> Besides the callback names and comments, is there anything else that still >> needs some adjustment in the other three patches? :) > It looks pretty good so far, much nicer than the previous versions. > > I have a small nit on the last patch, which should be dead easy to > address. I'm currently running a bunch of tests, hopefully nothing bad > will come out of it. > > If you respin it shortly, that nothing fails, and unless someone > shouts, I'll queue it for -next. It would be nice, thanks! I will address the nit and respin the series soon. Thanks, Yanan . > Thanks, > > M. >