From: Daniel Baluta <daniel.baluta@oss.nxp.com>
To: shengjiu.wang@oss.nxp.com, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, shengjiu.wang@nxp.com,
daniel.baluta@nxp.com, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, andersson@kernel.org,
mathieu.poirier@linaro.org, Frank.Li@nxp.com,
s.hauer@pengutronix.de, kernel@pengutronix.de,
festevam@gmail.com, p.zabel@pengutronix.de,
linux-remoteproc@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 5/5] arm64: dts: imx8ulp-evk: Enable HiFi4 DSP
Date: Thu, 12 Nov 2026 13:35:15 +0200 [thread overview]
Message-ID: <0e002d54-e94f-456d-847f-5d092f9461ed@oss.nxp.com> (raw)
In-Reply-To: <20261111031808.570680-6-shengjiu.wang@oss.nxp.com>
On 11/11/26 05:18, shengjiu.wang@oss.nxp.com wrote:
> From: Shengjiu Wang <shengjiu.wang@nxp.com>
>
> Configure the HiFi4 DSP clocks and memory regions, including the
> vdev0vring0, vdev0vring1, vdev0buffer, and dsp_reserved regions.
>
> Enable MU3, which provides the mailbox used for communication with
> the DSP, and enable the HiFi4 DSP.
>
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
prev parent reply other threads:[~2026-11-12 11:31 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-11 3:18 [PATCH v3 0/5] Enable DSP device for i.MX8ULP shengjiu.wang
2026-11-11 3:18 ` [PATCH v3 1/5] dt-bindings: dsp: fsl,dsp: document debug reset control shengjiu.wang
2026-11-12 10:38 ` Krzysztof Kozlowski
2026-11-11 3:18 ` [PATCH v3 2/5] dt-bindings: dsp: fsl,dsp: require resets for i.MX8ULP shengjiu.wang
2026-11-12 10:38 ` Krzysztof Kozlowski
2026-11-11 3:18 ` [PATCH v3 3/5] remoteproc: imx_dsp_rproc: use reset controller " shengjiu.wang
2026-11-12 11:36 ` Daniel Baluta
2026-11-11 3:18 ` [PATCH v3 4/5] arm64: dts: imx8ulp: add HiFi4 DSP node shengjiu.wang
2026-11-12 11:35 ` Daniel Baluta
2026-11-11 3:18 ` [PATCH v3 5/5] arm64: dts: imx8ulp-evk: Enable HiFi4 DSP shengjiu.wang
2026-11-12 11:35 ` Daniel Baluta [this message]
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