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Sun, 22 Feb 2026 22:18:17 -0800 From: Nicolin Chen To: CC: , , , , , , , , , , , Subject: [PATCH v12 1/8] iommu/arm-smmu-v3: Add a missing dma_wmb() for hitless STE update Date: Sun, 22 Feb 2026 22:18:02 -0800 Message-ID: <0e076722312d903bce71d8e0b963722f458d8df4.1771815709.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000A672E:EE_|MN2PR12MB4421:EE_ X-MS-Office365-Filtering-Correlation-Id: 81449a5b-13c1-45ff-2df9-08de72a36269 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|36860700013|82310400026|1800799024|7053199007; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?Ggi+bVEHmZzgOc7eFXp5VEakLnhrp5rPzSznjX7S7EpuSrNFAQ63ynTay9fk?= =?us-ascii?Q?TgUm3/kFbURQg0QnB32ENWezOkK3dtpQwK9M1uDV9nL0ILFJgptgiEPu+4go?= =?us-ascii?Q?KZMJxEh1ZPyyOU0kqSWEECoxXNNAK7Kz+vnYd35Vm1bfuCCtrr11TtPCfC/9?= =?us-ascii?Q?SmmV8/8VU76R9XYwHWe5NrWZhUYo/yERf/AsgP8BmNF1eRoNibPd+U8fyLY9?= =?us-ascii?Q?OIYJfm6NHip86XHvRD0sFR4KxvaAp6hCa5VP5qCBNYshKIX8xuKipe7k39sO?= =?us-ascii?Q?DpysF6ChBBSLT/ABG6BRLeo/4KXoydgiOXf/ZjWZXFzUOkmXL6gDir99toWv?= =?us-ascii?Q?1CgKJBrmaGde79YtoSG7cosU+e+vFgzdq+DROwucLILJs6pP+BlhPQu+uHXx?= =?us-ascii?Q?E7fRRgnK5oU4d+BYKtHtWcfIAAhZuMEndNZjbiQjzgHBtoBf2rOu2HKywfF7?= =?us-ascii?Q?qSQrpdHg2o20//YPrfXBeqTMXqS6sPAYdng6okKxey0nwT6wsFuJI6T+7GWv?= =?us-ascii?Q?XLBEnHimjxxG9Cx7JLhgvYCAQd+HIIyGmPOME0BFvVA+upS0rI2OcX76kBPw?= =?us-ascii?Q?gy2sy/scCOpQbberRVKT8wUA+rJwj/FILM03Z5jVaEaVG+UKeBnpyjL/KCPZ?= =?us-ascii?Q?ef0GSv9oNY0CRAJNsIHD8Au7uwq1YA+JIpflWmbk8kfjlwLlp+IPjoSR3M3f?= =?us-ascii?Q?9NQ/eVTlUtmvdCt1dqPDatTSJDyjnLm1BPxCwEnpX0j4N0Rw6gJ15QGRrmIP?= =?us-ascii?Q?4Wc3Qwu3Y2g2IGTsDfXw/opWKflJHpACFrH1wvzuirlo1aWOeuAletKLNpk2?= =?us-ascii?Q?Zqmtd03la4UiLooGbSoaj0r18oL8ok+sITCfUPTuhFK+iI17/7FTtoz1MVif?= =?us-ascii?Q?UNvhdfbi3jWTxIouQjB+2z7AX+SbNdf/1cSVwDIwPi4bW3bjjf1hloTYNSAB?= =?us-ascii?Q?fLyHwnU6yrz+xAxp/8m+49uHhEoqeC+1L7J/Nyrn6BAnSzQKEkgbwGWg5Al1?= =?us-ascii?Q?4tMrm4TFVrns1boypFqbUzSfQF1c8yJSPCu4CiK9LommpJtbGeq2JR18xS09?= =?us-ascii?Q?iPABnIUSeJro7trQUyoF0qS1fKCDLq4ykxyrBfpe1sHyzaGW4u6Isa2lnWTH?= =?us-ascii?Q?QUHKYDAEdlKuJIMQxQSXoqq1AVQp6MXbmrAhgqqeqpOR1S+mNBmIsNbcJ41I?= =?us-ascii?Q?vz0XLnI3VsTV+sUnawpKmb0Ii7KSDMaxdoY+cawk3xEKu4uABy6xTsSp/YO8?= =?us-ascii?Q?6qx2olgORUHA7T9GmZ9LlvScN18bninKNqBcDlXDgbUOuswwfugWd9A5Eyzt?= =?us-ascii?Q?H8aR9SP6KcrnFu4POv8IkmTR+9bdsMwWk33go2w4HuNDX3is0OWja2aUQ3Y9?= =?us-ascii?Q?ECpdzNHVN5qhLk/pFgnURyEcwr7dDldaOhR+CTht5SdHmApQbYc3QJjRYmi1?= =?us-ascii?Q?GBFavMzonFWNA8xE/HP4vSzw6QUibBX+fGIue7gVwgB4OqNbR4FCqar1sNBu?= =?us-ascii?Q?hbSvpPOPQUVYQrIKzGjXC77wOg8cpkBSW9Yrvwk6C+v/245U1fvpNIDBN9hS?= =?us-ascii?Q?7r8aIyVwW1wq8rmmoAcXevt/PclRYpO9SO7kb7QYa9xfgqxdSA4VGQ0DduE7?= =?us-ascii?Q?dgNEa/q/Mya0FCiviSMBM1vOfpzaoufanIIkIP28bmWpIlUCktXCDKXmBfeu?= =?us-ascii?Q?1d3Qvg=3D=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(7416014)(36860700013)(82310400026)(1800799024)(7053199007);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: fNepU3SyzMNgaH4i27D/AUwuqeyNxrbHopE6DzhNtEt3WRVNv7sKtOX336PzVbSwOHI2A8uvpM793QO0OZOv9UBUd4/a7TVlVFFwOoP4cVAdJLZbh1dXNj+bU+uXD7A+2vlQOEd2umHsnC9T/EjgOxf6LLjw8leeBxntJy8fk5uCxlU8V/SxFTDUAKFBEB7rRfcQXHgdTdm67snpWXOcB3GYlHmgim1hLtv83vMo9IndVrcPwkPqz5wU/nIov2sNU05/reWzZ3W42LGa1xGjfOJhdw2t5leWUpwQY2w+q11sFCD3HnwYMEnef20SaCvgm9olI17/25g7pOnrpo4AS5xEqKGtWOAl3KrFChIxPdf4g4u5gRTEq0e+joVTXXCA5SPy9eOi7D3wt1BQwsnXdBAjsYeI1A/u71E8mA8NCAdiFLJ2AXauXLEYevhPN7qB X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Feb 2026 06:18:38.7972 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 81449a5b-13c1-45ff-2df9-08de72a36269 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000A672E.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4421 When writing a new (previously invalid) valid IOPTE to a page table, then installing the page table into an STE hitlesslessly (e.g. in S2TTB field), there is a window before an STE invalidation, where the page-table may be accessed by SMMU but the new IOPTE is still siting in the CPU cache. This could occur when we allocate an iommu_domain and immediately install it hitlessly, while there would be no dma_wmb() for the page table memory prior to the earliest point of HW reading the STE. Fix it by adding a dma_wmb() prior to updating the STE. Fixes: 56e1a4cc2588 ("iommu/arm-smmu-v3: Add unit tests for arm_smmu_write_entry") Cc: stable@vger.kernel.org Reported-by: Will Deacon Closes: https://lore.kernel.org/linux-iommu/aXdlnLLFUBwjT0V5@willie-the-truck/ Suggested-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 4d00d796f0783..606abe051e68b 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1236,6 +1236,13 @@ void arm_smmu_write_entry(struct arm_smmu_entry_writer *writer, __le64 *entry, __le64 unused_update[NUM_ENTRY_QWORDS]; u8 used_qword_diff; + /* + * Many of the entry structures have pointers to other structures that + * need to have their updates be visible before any writes of the entry + * happen. + */ + dma_wmb(); + used_qword_diff = arm_smmu_entry_qword_diff(writer, entry, target, unused_update); if (hweight8(used_qword_diff) == 1) { -- 2.43.0