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Mon, 30 Sep 2024 14:45:32 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 48UEjVUI025992 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 30 Sep 2024 14:45:31 GMT Received: from [10.152.195.140] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 30 Sep 2024 07:45:28 -0700 Message-ID: <0e38cd39-ba91-48f8-a4ee-c90bf95acdfe@quicinc.com> Date: Mon, 30 Sep 2024 20:15:24 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/1] i2c: qcom-geni: Support systems with 32MHz serial engine clock From: Manikanta Mylavarapu To: Vladimir Zapolskiy , , , , CC: , References: <20240926034304.3565278-1-quic_mmanikan@quicinc.com> <2de5f3e7-1fd6-4368-94bc-4eecc8fc6752@quicinc.com> Content-Language: en-US In-Reply-To: <2de5f3e7-1fd6-4368-94bc-4eecc8fc6752@quicinc.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: NqkfyRA8fxHIJ_Gw0wCPyI82Bhw_ngIA X-Proofpoint-ORIG-GUID: NqkfyRA8fxHIJ_Gw0wCPyI82Bhw_ngIA X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 malwarescore=0 spamscore=0 mlxscore=0 phishscore=0 impostorscore=0 clxscore=1015 adultscore=0 mlxlogscore=999 bulkscore=0 priorityscore=1501 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2408220000 definitions=main-2409300107 On 9/29/2024 12:06 PM, Manikanta Mylavarapu wrote: > > > On 9/26/2024 3:58 PM, Vladimir Zapolskiy wrote: >> Hello Manikanta. >> >> On 9/26/24 06:43, Manikanta Mylavarapu wrote: >>> In existing socs, I2C serial engine is sourced from XO (19.2MHz). >>> Where as in IPQ5424, I2C serial engine is sourced from GPLL0 (32MHz). >>> >>> The existing map table is based on 19.2MHz. This patch incorporate >>> the clock map table to derive the SCL clock from the 32MHz source >>> clock frequency. >>> >>> Signed-off-by: Manikanta Mylavarapu >>> --- >>> Changes in v2: >>>     - Dropped IPQ5424 from the commit title >>>     - Added else part to assign geni_i2c_clk_map_19p2mhz to itr >>>     - Dropped MHZ macro and used HZ_PER_MHZ macro >>>     - Expanded SE to serial engine >>>     - Added the reason for 32MHz clock in commit message >>> >>>   drivers/i2c/busses/i2c-qcom-geni.c | 19 ++++++++++++++++--- >>>   1 file changed, 16 insertions(+), 3 deletions(-) >>> >>> diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c >>> index 212336f724a6..22f2a0d83641 100644 >>> --- a/drivers/i2c/busses/i2c-qcom-geni.c >>> +++ b/drivers/i2c/busses/i2c-qcom-geni.c >>> @@ -16,6 +16,7 @@ >>>   #include >>>   #include >>>   #include >>> +#include >>>     #define SE_I2C_TX_TRANS_LEN        0x26c >>>   #define SE_I2C_RX_TRANS_LEN        0x270 >>> @@ -146,18 +147,30 @@ struct geni_i2c_clk_fld { >>>    * clk_freq_out = t / t_cycle >>>    * source_clock = 19.2 MHz >>>    */ >>> -static const struct geni_i2c_clk_fld geni_i2c_clk_map[] = { >>> +static const struct geni_i2c_clk_fld geni_i2c_clk_map_19p2mhz[] = { >>>       {KHZ(100), 7, 10, 11, 26}, >>>       {KHZ(400), 2,  5, 12, 24}, >>>       {KHZ(1000), 1, 3,  9, 18}, >>>   }; >>>   +/* source_clock = 32 MHz */ >>> +static const struct geni_i2c_clk_fld geni_i2c_clk_map_32mhz[] = { >>> +    {KHZ(100), 7, 14, 18, 40}, >>> +    {KHZ(400), 4,  3, 11, 20}, >>> +    {KHZ(1000), 4, 3,  6, 15}, >>> +}; >> >> Please double check the values. >> >> This is what I get: >> * for 100KHz: 32000000 / (40 * 7) ~ 114286, apparently 32000000 / (40 * 8) would >> be a better fit, however it's unclear what would be proper t_high / t_low values, >> * for 400KHz: it seems good, >> * for 1000KHz: 32000000 / (15 * 4) ~ 533333, which is almost 1/2 of the wanted >> bus frequency, so this one looks very wrong. >> >> Do you have any ideas how to get better bus frequency settings? >> > > Thanks for pointing this out. > > I will double check and get back with the proper data. > > Thanks & Regards, > Manikanta. > Based on Qualcomm's internal hardware programming guide, below values need to be used for 100K & 1000K. {KHZ(100), 8, 14, 18, 40} {KHZ(1000), 2, 3, 6, 15} I will update these values in next version. Thanks & Regards, Manikanta.