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From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Sean Christopherson <seanjc@google.com>
Cc: Michael Kelley <mhklinux@outlook.com>,
	Xi Ruoyao <xry111@xry111.site>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Andy Lutomirski <luto@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	"H. Peter Anvin" <hpa@zytor.com>,
	"x86@kernel.org" <x86@kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Dexuan Cui <decui@microsoft.com>
Subject: Re: [PATCH v2] x86/mm: Don't disable INVLPG if "incomplete Global INVLPG flushes" is fixed by microcode
Date: Fri, 5 Apr 2024 01:02:06 +0100	[thread overview]
Message-ID: <0e3b8b42-4567-4db8-9f82-659d0ea10597@citrix.com> (raw)
In-Reply-To: <Zg7jLn-lV55Yh6mH@google.com>

On 04/04/2024 6:28 pm, Sean Christopherson wrote:
> On Thu, Apr 04, 2024, Andrew Cooper wrote:
>> A related example.  I wrote the patch to hide XSAVES to work around an
>> AMD erratum where XSAVEC sufficed, and the consequences were so dire for
>> some versions of Windows that there was a suggestion to simply revert
>> the workaround to make VMs run again.  Windows intentionally asserts
>> sanity (== expectations) in what it can see; I have no idea whether it
>> would object in this case but hiding PCID is definitely playing with fire.
> Yeah, KVM users got burned by that too.  d52734d00b8e ("KVM: x86: Give a hint when
> Win2016 might fail to boot due to XSAVES erratum").

Yeah what I meant was that I wrote the Linux patch, and KVM got burnt
while Xen cared not... :)

> Hmm, one crazy idea would be to carve out a hypervisor CPUID range for enumerating
> (potentially) broken features.  Dealing with the Intel/AMD (and Centaur, LOL),
> 0 / 0x8000_0000 split would be annoying, but not hard.  E.g. use 0x4{0,8,C}01_xxxx

No transmeta love then?  Or perhaps we declare it their fault for
choosing 0x8086 which is too awkward to fit into that scheme.

> to enumerate broken features, and then the guest could do:
>
> 	support = CPUID(leaf).reg & ~CPUID(to_pv_broken(leaf)).reg;
>
> It'd require a decent amount of churn for the initial support, but it would give
> hypervisors a way to inform guests that _any_ CPUID-based feature is broken,
> without requiring guest changes (after the initial code is merged) or explicit
> action from hardware vendors.
>
> And if we got Windows/Hyper-V in on the game, it would allow them to keep their
> sanity checks while (hopefully) degrading gracefully if a feature is enumerated
> as broken.

Crazy indeed, but I am curious to see if this has legs.  The exact
indices may need tweaking, because 0x4x01_xxxx might be a little too
close for comfort, but at first glance it does look like a surprisingly
neat solution to the problem.

Perhaps worth a slot at plumbers?

~Andrew

  parent reply	other threads:[~2024-04-05  0:02 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-24 19:05 Xi Ruoyao
2024-03-25  4:57 ` Michael Kelley
2024-03-25 10:21   ` Xi Ruoyao
2024-03-25 20:06     ` Michael Kelley
2024-03-25 21:41       ` Xi Ruoyao
2024-04-04 16:18   ` Sean Christopherson
2024-04-04 16:48     ` Andrew Cooper
2024-04-04 17:28       ` Sean Christopherson
2024-04-04 17:48         ` Michael Kelley
2024-04-04 18:08           ` Dave Hansen
2024-04-08 23:31             ` Michael Kelley
2024-04-09  1:43               ` Sean Christopherson
2024-04-09  7:56                 ` Andrew Cooper
2024-04-11  5:38                   ` Xi Ruoyao
2024-04-11  9:40                     ` Andrew Cooper
2024-04-05  0:02         ` Andrew Cooper [this message]
2024-03-25 23:13 ` Pawan Gupta

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