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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: EEp5VVK2_O03E3-mo4MFTc0KKWRstrva X-Authority-Analysis: v=2.4 cv=Jt/xrN4C c=1 sm=1 tr=0 ts=68b7e4c7 cx=c_pps a=rEQLjTOiSrHUhVqRoksmgQ==:117 a=PZ7RaY4/qyhr7oYTfvPPhg==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=EUspDBNiAAAA:8 a=04NQbcWpfGPlwerc6EQA:9 a=QEXdDO2ut3YA:10 a=2VI0MkxyNR6bbpdq8BZq:22 X-Proofpoint-ORIG-GUID: EEp5VVK2_O03E3-mo4MFTc0KKWRstrva X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODMwMDAwMSBTYWx0ZWRfX/EtVS27fSuwM KNOu7nMes73teXELfCanMG5uHLGJwrR4s0TisHWNfT9kPO8Xw+Nqdmd+PK31YAs24ZAdcIgYIMj 103ClVs2+sRsdzrt3PnJcfWBBkCJxFCs40GKHFrTebrZJfCctBzCZjrZfLNmIa17fpQhU/HmFK0 3CkhUVKtejMx1bD2b8idefP3PwgRTLUxpZKUM6mdrUwlslqvhIg15s8x6HXtx/niNyNOABma3Zp y20TsOynCd62Q5Vb21Ccgvyy58dvHlk9IKsIGE/RVrSPqG+XyNoc896esL0tqxnulppSX88Qthv Wg6FAZElPcAVZy6sMiRAqpB4cX9eBr2wopqJczbs2HuyqkK8r6YI+hAr1VJbKrIzqwb1DZ501P4 xPUJUQ5n X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-03_02,2025-08-28_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 priorityscore=1501 clxscore=1015 bulkscore=0 impostorscore=0 spamscore=0 phishscore=0 suspectscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508300001 On 8/30/2025 5:47 AM, Dmitry Baryshkov wrote: > On Fri, Aug 29, 2025 at 03:45:17PM +0530, Taniya Das wrote: >> Some clock branches require inverted logic for memory gating, where >> disabling the memory involves setting a bit and enabling it involves >> clearing the same bit. This behavior differs from the standard approach >> memory branch clocks ops where enabling typically sets the bit. >> >> Introducing the mem_enable_invert to allow conditional handling of >> these sequences of the inverted control logic for memory operations >> required on those memory clock branches. >> >> Signed-off-by: Taniya Das >> --- >> drivers/clk/qcom/clk-branch.c | 14 +++++++++++--- >> drivers/clk/qcom/clk-branch.h | 4 ++++ >> 2 files changed, 15 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/clk/qcom/clk-branch.c b/drivers/clk/qcom/clk-branch.c >> index 0f10090d4ae681babbdbbb1b6c68ffe77af7a784..90da1c94b4736f65c87aec92303d511c4aa9a173 100644 >> --- a/drivers/clk/qcom/clk-branch.c >> +++ b/drivers/clk/qcom/clk-branch.c >> @@ -142,8 +142,12 @@ static int clk_branch2_mem_enable(struct clk_hw *hw) >> u32 val; >> int ret; >> >> - regmap_update_bits(branch.clkr.regmap, mem_br->mem_enable_reg, >> - mem_br->mem_enable_ack_mask, mem_br->mem_enable_ack_mask); >> + if (mem_br->mem_enable_invert) >> + regmap_update_bits(branch.clkr.regmap, mem_br->mem_enable_reg, >> + mem_br->mem_enable_mask, 0); >> + else >> + regmap_update_bits(branch.clkr.regmap, mem_br->mem_enable_reg, >> + mem_br->mem_enable_ack_mask, mem_br->mem_enable_ack_mask); > > Please check that your lines are properly indented. > Sorry, sure will fix in the next patch. >> >> ret = regmap_read_poll_timeout(branch.clkr.regmap, mem_br->mem_ack_reg, >> val, val & mem_br->mem_enable_ack_mask, 0, 200); >> @@ -159,7 +163,11 @@ static void clk_branch2_mem_disable(struct clk_hw *hw) >> { >> struct clk_mem_branch *mem_br = to_clk_mem_branch(hw); >> >> - regmap_update_bits(mem_br->branch.clkr.regmap, mem_br->mem_enable_reg, >> + if (mem_br->mem_enable_invert) >> + regmap_update_bits(mem_br->branch.clkr.regmap, mem_br->mem_enable_reg, >> + mem_br->mem_enable_mask, mem_br->mem_enable_mask); > > This creates assymmetry. The drivers uses mem_enable_mask in one case > and mem_enable_ack_mask in another. Will try to use the common mask. > >> + else >> + regmap_update_bits(mem_br->branch.clkr.regmap, mem_br->mem_enable_reg, >> mem_br->mem_enable_ack_mask, 0); > > And here. > Will fix here too. >> >> return clk_branch2_disable(hw); >> diff --git a/drivers/clk/qcom/clk-branch.h b/drivers/clk/qcom/clk-branch.h >> index 292756435f53648640717734af198442a315272e..6bc2ba2b5350554005b7f0c84f933580b7582fc7 100644 >> --- a/drivers/clk/qcom/clk-branch.h >> +++ b/drivers/clk/qcom/clk-branch.h >> @@ -44,6 +44,8 @@ struct clk_branch { >> * @mem_enable_reg: branch clock memory gating register >> * @mem_ack_reg: branch clock memory ack register >> * @mem_enable_ack_mask: branch clock memory enable and ack field in @mem_ack_reg >> + * @mem_enable_mask: branch clock memory enable mask >> + * @mem_enable_invert: branch clock memory enable and disable has invert logic >> * @branch: branch clock gating handle >> * >> * Clock which can gate its memories. >> @@ -52,6 +54,8 @@ struct clk_mem_branch { >> u32 mem_enable_reg; >> u32 mem_ack_reg; >> u32 mem_enable_ack_mask; >> + u32 mem_enable_mask; >> + bool mem_enable_invert; >> struct clk_branch branch; >> }; >> >> >> -- >> 2.34.1 >> > -- Thanks, Taniya Das