From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752673AbdIVWlo (ORCPT ); Fri, 22 Sep 2017 18:41:44 -0400 Received: from mail-pg0-f66.google.com ([74.125.83.66]:36540 "EHLO mail-pg0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752083AbdIVWlm (ORCPT ); Fri, 22 Sep 2017 18:41:42 -0400 X-Google-Smtp-Source: AOwi7QAYg/1Mf4kpHQi6rdSEoXgYOZgkAq4U9m6p5XhR5sw4Z9Gtb8fb0jlx7qBRa8taToj/3HrwOg== Subject: Re: [PATCH] i2c: piix4: Fix SMBus port selection for AMD Family 17h chips To: Wolfram Sang Cc: Jean Delvare , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org References: <1500162686-21682-1-git-send-email-linux@roeck-us.net> <20170812113357.ijna5riha7uechja@ninjato> From: Guenter Roeck Message-ID: <0ec731d7-16c5-9303-b528-fd795b0f65be@roeck-us.net> Date: Fri, 22 Sep 2017 15:41:39 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.3.0 MIME-Version: 1.0 In-Reply-To: <20170812113357.ijna5riha7uechja@ninjato> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 08/12/2017 04:33 AM, Wolfram Sang wrote: > On Sat, Jul 15, 2017 at 04:51:26PM -0700, Guenter Roeck wrote: >> AMD Family 17h uses the KERNCZ SMBus controller. While its documentation >> is not publicly available, it is documented in the BIOS and Kernel >> Developer’s Guide for AMD Family 15h Models 60h-6Fh Processors. >> >> On this SMBus controller, the port select register is at PMx register >> 0x02, bit 4:3 (PMx00 register bit 20:19). >> >> Without this patch, the 4 SMBus channels on AMD Family 17h chips are >> mirrored and report the same chips on all channels. >> >> Signed-off-by: Guenter Roeck > > I need input from Jean for this one. > I am getting feedback from others that both Ryzen and Threadripper CPUs are affected. It would be great if we can find a means to move this forward or find a better fix. Thanks, Guenter >> --- >> drivers/i2c/busses/i2c-piix4.c | 30 ++++++++++++++++++++++++++---- >> 1 file changed, 26 insertions(+), 4 deletions(-) >> >> diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c >> index 0ecdb47a23ab..01f767ee4546 100644 >> --- a/drivers/i2c/busses/i2c-piix4.c >> +++ b/drivers/i2c/busses/i2c-piix4.c >> @@ -94,6 +94,12 @@ >> #define SB800_PIIX4_PORT_IDX_ALT 0x2e >> #define SB800_PIIX4_PORT_IDX_SEL 0x2f >> #define SB800_PIIX4_PORT_IDX_MASK 0x06 >> +#define SB800_PIIX4_PORT_IDX_SHIFT 1 >> + >> +/* On kerncz, SmBus0Sel is at bit 20:19 of PMx00 DecodeEn */ >> +#define SB800_PIIX4_PORT_IDX_KERNCZ 0x02 >> +#define SB800_PIIX4_PORT_IDX_MASK_KERNCZ 0x18 >> +#define SB800_PIIX4_PORT_IDX_SHIFT_KERNCZ 3 >> >> /* insmod parameters */ >> >> @@ -149,6 +155,8 @@ static const struct dmi_system_id piix4_dmi_ibm[] = { >> */ >> static DEFINE_MUTEX(piix4_mutex_sb800); >> static u8 piix4_port_sel_sb800; >> +static u8 piix4_port_mask_sb800; >> +static u8 piix4_port_shift_sb800; >> static const char *piix4_main_port_names_sb800[PIIX4_MAX_ADAPTERS] = { >> " port 0", " port 2", " port 3", " port 4" >> }; >> @@ -347,7 +355,19 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev, >> >> /* Find which register is used for port selection */ >> if (PIIX4_dev->vendor == PCI_VENDOR_ID_AMD) { >> - piix4_port_sel_sb800 = SB800_PIIX4_PORT_IDX_ALT; >> + switch (PIIX4_dev->device) { >> + case PCI_DEVICE_ID_AMD_KERNCZ_SMBUS: >> + piix4_port_sel_sb800 = SB800_PIIX4_PORT_IDX_KERNCZ; >> + piix4_port_mask_sb800 = SB800_PIIX4_PORT_IDX_MASK_KERNCZ; >> + piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT_KERNCZ; >> + break; >> + case PCI_DEVICE_ID_AMD_HUDSON2_SMBUS: >> + default: >> + piix4_port_sel_sb800 = SB800_PIIX4_PORT_IDX_ALT; >> + piix4_port_mask_sb800 = SB800_PIIX4_PORT_IDX_MASK; >> + piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT; >> + break; >> + } >> } else { >> mutex_lock(&piix4_mutex_sb800); >> outb_p(SB800_PIIX4_PORT_IDX_SEL, SB800_PIIX4_SMB_IDX); >> @@ -355,6 +375,8 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev, >> piix4_port_sel_sb800 = (port_sel & 0x01) ? >> SB800_PIIX4_PORT_IDX_ALT : >> SB800_PIIX4_PORT_IDX; >> + piix4_port_mask_sb800 = SB800_PIIX4_PORT_IDX_MASK; >> + piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT; >> mutex_unlock(&piix4_mutex_sb800); >> } >> >> @@ -616,8 +638,8 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, >> smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1); >> >> port = adapdata->port; >> - if ((smba_en_lo & SB800_PIIX4_PORT_IDX_MASK) != port) >> - outb_p((smba_en_lo & ~SB800_PIIX4_PORT_IDX_MASK) | port, >> + if ((smba_en_lo & piix4_port_mask_sb800) != port) >> + outb_p((smba_en_lo & ~piix4_port_mask_sb800) | port, >> SB800_PIIX4_SMB_IDX + 1); >> >> retval = piix4_access(adap, addr, flags, read_write, >> @@ -706,7 +728,7 @@ static int piix4_add_adapter(struct pci_dev *dev, unsigned short smba, >> >> adapdata->smba = smba; >> adapdata->sb800_main = sb800_main; >> - adapdata->port = port << 1; >> + adapdata->port = port << piix4_port_shift_sb800; >> >> /* set up the sysfs linkage to our parent device */ >> adap->dev.parent = &dev->dev; >> -- >> 2.7.4 >>