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Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH V1] accel/amdxdna: Enable hardware context priority Content-Language: en-US To: Mario Limonciello , , , , CC: , , References: <20251217171719.2139025-1-lizhi.hou@amd.com> From: Lizhi Hou In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF00017095:EE_|CH3PR12MB9252:EE_ X-MS-Office365-Filtering-Correlation-Id: 05053029-c333-4f19-2e34-08de3e65524c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700013|376014|1800799024|7053199007; X-Microsoft-Antispam-Message-Info: =?utf-8?B?azg5ZFVyWmJIaDdIV2lCamIxenluN0tyTy9DbDluWEcvK0FwdktBMXROSERH?= =?utf-8?B?V0VkdUd6eWplOExSME8yOGxHTkpBQnoyblRQWnhjb1FLZGhtRjVRSmp2NFNW?= =?utf-8?B?d2NDR0s4ck5NR3AzRkd3YWRjR3VYQU1jQjhJRWJQSk9VS1Q2cVh0QTk3aXNa?= =?utf-8?B?QUtPdkN3V1ovU1l4L2o2emt6VmpCeklpYk94UDlCemJzcHJ1S0c0L1dWQk5H?= =?utf-8?B?TTlUL1c0MVFJMVQ3ckt0dytib0EybkVPNUdJendlYWtydklMLzRQS05KUWw1?= =?utf-8?B?WVVvdXl5dnVTNm4zbUJiNExRYlRZNFNQN054S0M0NDltNURKSTd2VmxQNTFV?= =?utf-8?B?MFJhOFpuRU5rS052KzY5VjNTeFUraStaTzJqN09wMDlxMlZnSHBvRjFPOStP?= =?utf-8?B?QUVQMlcrM3MvRGlmOFVLc2V0SDMwcGtkbzMraERzUUJLcHphZjk3RFYvMXhK?= =?utf-8?B?bnF1ajFDUTl3SThyYUJCYk1yWGdIbWlZbGFqS2VOQ2RPdG1WYVJvakZ3VEdk?= =?utf-8?B?S1VDcVR3WjgwT3ZUbWpmbk5IYS9tcm9meVJnUFpZNU9OaFVRdS8xVjhERGIy?= =?utf-8?B?SEpIa01jNjcrQmkrLzR2aFA2cndiMW9ESzZaM2JCcGJuWm1xSjUzVFZ5MkFv?= =?utf-8?B?djFaWDVzVW5xT0t0aWpGOUtMQjdBRE15WklWRjBydFlKK21BbmdmSGx3ckhD?= =?utf-8?B?ZEQxVmpjS043Q1ovTWVXZUpiQjVvQllGMkswTklSRVkwLzYvdDl3ZUd6OUNq?= =?utf-8?B?L2c1aHN5SFFSQWVnbjlVSnV4aytSN1hYYzZFa0pxbFFpTHJrUkhSY0ZSa0c2?= =?utf-8?B?em5ZY3c0MVlYd2JvclN2d3YrUUVzWWlXWmd6dkszd0NPWnh0QUpFaHRwbWZD?= =?utf-8?B?Rml3UVIvTEw5K1d3OEltRWxkS0JCWGNpbzdwcG5XUTNHbFdCZFlsM0U3dHJT?= =?utf-8?B?aEI1Rkh4MWZrOU51bTc2alE2QUVPSlZqakIxZ2dJNFNKVnJTZnJqK0xZMDFp?= =?utf-8?B?OW0vRVY0ck84L09KSDVQU0lER0R0R093NGRIbDhkRVNIRmkyUXdHTlhKelVS?= =?utf-8?B?MXhCNDRLVXRMVzdKdjZHT1dDZEk0TXVXYXpUN29IUmIyNU1maGdDUnN2Wk13?= =?utf-8?B?eW84TkZFZTR1QkI0djBHNVNuUzQxZVpYZVphdnFvY3Y1cytyS3pSbUNDbFFa?= =?utf-8?B?OHZzMnV5TXpzU3RUYzRIa2xQVnNxRGUwTnFOd0xNN0xpaWp3cjJvRDJVZXhi?= =?utf-8?B?Sm9FZHcvN1U5T2tZYmFJZkF2enR4cHk1Y29hckZwOVZaOVJFUk1HSFNLWGwy?= =?utf-8?B?YkhEd0tnMWFUWksvM2pkeW0xL0padFZ0YUdaZzNCR2VjbjRlaXgwak1IRkt4?= =?utf-8?B?N1ZDdXh2dnhNQ0JmZVJJUE1UTjFoaVRvWTdKMUlWZVNmS0JHNFBiWFRNV0Fs?= =?utf-8?B?Z1JsRmVVUWVCamhtVWxPV0ZSNFFRS081Q01MNTZxbG13bStYV2VXbzVyenEr?= =?utf-8?B?eDdhVmRlbUtROTNZWGs2MzU3TjljM2FtaGMxQmFRemMrcmdGZE40UThVQmUv?= =?utf-8?B?SkVpWTQ2TGxLakYvQmRUQnZhREFzc3Y5N1piSytVQXJQZXpYTTRUMFZVZXI5?= =?utf-8?B?cHVUUVc2UGxtSExvekFhcjFIcTJKYWFDaXhzNFdkcTA3K1BKTndGcTN2WThs?= =?utf-8?B?L2FFdllERDZpeS91c0p3TEwrMGxORnRTU1h2UHlxVXFudEtvV2gxWHpRWWJh?= =?utf-8?B?MHlqcklKQ2srQW44QnpJcmVMSGNKVzBJYnRPUEFjQVJrVU91NVB1UHlaMTBB?= =?utf-8?B?OFpyYlB0dml3ektmLzVYM0t4NUZoeENRcDFKR1ZoR2YzTlY2Q0RVT1pPQmd3?= =?utf-8?B?RUorWm5ObUJWcmR1R2ZURGpHQTRNaHVORFkrTHVWSFRDVENQQm1Sc3IwQ0N2?= =?utf-8?B?d2QzK1NVWVQwaUhEdGx3QlJjYmdzQ0NicW5vV1FqUW5URmRRVE9rbkJiM0V1?= =?utf-8?B?YURSUkg1ZmtEU2lBd3lINURBQXdWbktNUDJCaTIwcDBRMXc4TU5zNE9VbHk5?= =?utf-8?B?REhoZGtkcmFOL1F0dEVhRHlWckdBandyTGdjWWkyaGdLTGt3c3ZVVzQ3MWNw?= =?utf-8?Q?/6HA=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb08.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(36860700013)(376014)(1800799024)(7053199007);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Dec 2025 18:43:22.5787 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 05053029-c333-4f19-2e34-08de3e65524c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF00017095.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB9252 Applied to drm-misc-next On 12/17/25 09:59, Mario Limonciello wrote: > On 12/17/25 11:17 AM, Lizhi Hou wrote: >> Newer firmware supports hardware context priority. Set the priority >> based >> on application input. >> >> Signed-off-by: Lizhi Hou > > Reviewed-by: Mario Limonciello (AMD) > > This change itself is fine, but while reviewing it I did have a > question to ask. > > I notice that NPU2, NPU4, NPU5 and NPU6 all use npu4_fw_feature_table. > Is this feature really present in F/W for NPU2 devices too?  Or it's > really only NPU4 and later feature? > > IE I just wonder if it's a non-obvious problem that npu2 device should > have it's own fw feature table rather than re-use NPU4's. NPU1 has > it's own feature table. > >> --- >>   drivers/accel/amdxdna/aie2_message.c  | 23 ++++++++++++++++++++++- >>   drivers/accel/amdxdna/aie2_msg_priv.h |  5 +++++ >>   include/uapi/drm/amdxdna_accel.h      |  8 ++++++++ >>   3 files changed, 35 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/accel/amdxdna/aie2_message.c >> b/drivers/accel/amdxdna/aie2_message.c >> index e77a353cadc5..051f4ceaabae 100644 >> --- a/drivers/accel/amdxdna/aie2_message.c >> +++ b/drivers/accel/amdxdna/aie2_message.c >> @@ -205,6 +205,27 @@ static int aie2_destroy_context_req(struct >> amdxdna_dev_hdl *ndev, u32 id) >>         return ret; >>   } >> + >> +static u32 aie2_get_context_priority(struct amdxdna_dev_hdl *ndev, >> +                     struct amdxdna_hwctx *hwctx) >> +{ >> +    if (!AIE2_FEATURE_ON(ndev, AIE2_PREEMPT)) >> +        return PRIORITY_HIGH; >> + >> +    switch (hwctx->qos.priority) { >> +    case AMDXDNA_QOS_REALTIME_PRIORITY: >> +        return PRIORITY_REALTIME; >> +    case AMDXDNA_QOS_HIGH_PRIORITY: >> +        return PRIORITY_HIGH; >> +    case AMDXDNA_QOS_NORMAL_PRIORITY: >> +        return PRIORITY_NORMAL; >> +    case AMDXDNA_QOS_LOW_PRIORITY: >> +        return PRIORITY_LOW; >> +    default: >> +        return PRIORITY_HIGH; >> +    } >> +} >> + >>   int aie2_create_context(struct amdxdna_dev_hdl *ndev, struct >> amdxdna_hwctx *hwctx) >>   { >>       DECLARE_AIE2_MSG(create_ctx, MSG_OP_CREATE_CONTEXT); >> @@ -221,7 +242,7 @@ int aie2_create_context(struct amdxdna_dev_hdl >> *ndev, struct amdxdna_hwctx *hwct >>       req.num_unused_col = hwctx->num_unused_col; >>       req.num_cq_pairs_requested = 1; >>       req.pasid = hwctx->client->pasid; >> -    req.context_priority = 2; >> +    req.context_priority = aie2_get_context_priority(ndev, hwctx); >>         ret = aie2_send_mgmt_msg_wait(ndev, &msg); >>       if (ret) >> diff --git a/drivers/accel/amdxdna/aie2_msg_priv.h >> b/drivers/accel/amdxdna/aie2_msg_priv.h >> index cc912b7899ce..728ef56f7f0a 100644 >> --- a/drivers/accel/amdxdna/aie2_msg_priv.h >> +++ b/drivers/accel/amdxdna/aie2_msg_priv.h >> @@ -108,6 +108,11 @@ struct cq_pair { >>       struct cq_info i2x_q; >>   }; >>   +#define PRIORITY_REALTIME    1 >> +#define PRIORITY_HIGH        2 >> +#define PRIORITY_NORMAL        3 >> +#define PRIORITY_LOW        4 >> + >>   struct create_ctx_req { >>       __u32    aie_type; >>       __u8    start_col; >> diff --git a/include/uapi/drm/amdxdna_accel.h >> b/include/uapi/drm/amdxdna_accel.h >> index 62c917fd4f7b..9c44db2b3dcd 100644 >> --- a/include/uapi/drm/amdxdna_accel.h >> +++ b/include/uapi/drm/amdxdna_accel.h >> @@ -19,6 +19,14 @@ extern "C" { >>   #define AMDXDNA_INVALID_BO_HANDLE    0 >>   #define AMDXDNA_INVALID_FENCE_HANDLE    0 >>   +/* >> + * Define hardware context priority >> + */ >> +#define AMDXDNA_QOS_REALTIME_PRIORITY    0x100 >> +#define AMDXDNA_QOS_HIGH_PRIORITY    0x180 >> +#define AMDXDNA_QOS_NORMAL_PRIORITY    0x200 >> +#define AMDXDNA_QOS_LOW_PRIORITY    0x280 >> + >>   enum amdxdna_device_type { >>       AMDXDNA_DEV_TYPE_UNKNOWN = -1, >>       AMDXDNA_DEV_TYPE_KMQ, >