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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ae6e8265bbesm286528966b.80.2025.07.11.05.16.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 11 Jul 2025 05:16:23 -0700 (PDT) Message-ID: <0ef83a1e-38c3-41bb-8fd2-c28565f2a0ba@oss.qualcomm.com> Date: Fri, 11 Jul 2025 14:16:19 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 07/10] dt-bindings: clock: qcom: Add NSS clock controller for IPQ5424 SoC To: Rob Herring , Luo Jie Cc: Georgi Djakov , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Michael Turquette , Stephen Boyd , Anusha Rao , Konrad Dybcio , Philipp Zabel , Richard Cochran , Catalin Marinas , Will Deacon , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, quic_kkumarcs@quicinc.com, quic_linchen@quicinc.com, quic_leiwei@quicinc.com, quic_pavir@quicinc.com, quic_suruchia@quicinc.com References: <20250710-qcom_ipq5424_nsscc-v3-0-f149dc461212@quicinc.com> <20250710-qcom_ipq5424_nsscc-v3-7-f149dc461212@quicinc.com> <20250710225539.GA29510-robh@kernel.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250710225539.GA29510-robh@kernel.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=P7o6hjAu c=1 sm=1 tr=0 ts=6871009a cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=COk6AnOGAAAA:8 a=AWTENMeICeJJ9JQOPWgA:9 a=QEXdDO2ut3YA:10 a=PEH46H7Ffwr30OY-TuGO:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: ltednxd49z713h2KVypId2pT9SHF69Fv X-Proofpoint-GUID: ltednxd49z713h2KVypId2pT9SHF69Fv X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzExMDA4NiBTYWx0ZWRfX26C3+Nljg+Kx AXv10KfAFrbhceLvETPmZP95Qb+ESqXpNqclr573Gesf9rrDplEfuXc/uRLm2BcDVXfcIDhE0qL j8lFEegL2Eypcuz/dDArIslmBc48ipdzIIv/mY0N4WqjTnz1dZkVCgGFkXb4bkfJjVMnlgQpFuD SGvsaHL10MzU2koruJEuzZf/iYvRVcsSmZO5JE62oBUK1dSsmhuasBQhxwoTg+h+auQ/ZuAzML1 GC3ekgcAJMKOvid72vJ+hqts/MIg+bw032vBymic9LjFylztAvKHcxWAEL0xo4/iYZ9PDs1V3g1 dxh+YkSAavO4JPlKmTW+sYeBWsF1t9t8PL9AD7s1ZTaQcz7o3zbi+ryojhPBGtItiyPmyHNoWBU P59UOdXKL/TtG8bBEfWGZqwOktz6fnCJmNgutwJg3APDRuUsz4WP3TMRzLazvnQzeIKtCW1C X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-07-11_03,2025-07-09_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 priorityscore=1501 phishscore=0 bulkscore=0 mlxscore=0 malwarescore=0 spamscore=0 lowpriorityscore=0 suspectscore=0 clxscore=1015 adultscore=0 mlxlogscore=999 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507110086 On 7/11/25 12:55 AM, Rob Herring wrote: > On Thu, Jul 10, 2025 at 08:28:15PM +0800, Luo Jie wrote: >> NSS clock controller provides the clocks and resets to the networking >> blocks such as PPE (Packet Process Engine) and UNIPHY (PCS) on IPQ5424 >> devices. >> >> Add the compatible "qcom,ipq5424-nsscc" support based on the current >> IPQ9574 NSS clock controller DT binding file. ICC clocks are always >> provided by the NSS clock controller of IPQ9574 and IPQ5424, so add >> interconnect-cells as required DT property. >> >> Also add master/slave ids for IPQ5424 networking interfaces, which is >> used by nss-ipq5424 driver for providing interconnect services using >> icc-clk framework. >> >> Signed-off-by: Luo Jie >> --- [...] >> clocks: >> items: >> @@ -57,6 +61,7 @@ required: >> - compatible >> - clocks >> - clock-names >> + - '#interconnect-cells' > > You just made this required for everyone. Again, that's an ABI change. In this case it's actually valid, but should be a separate fixup change Konrad