From: Jianjun Wang <jianjun.wang@mediatek.com>
To: Rob Herring <robh@kernel.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
<linux-pci@vger.kernel.org>, <linux-mediatek@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
Ryder Lee <ryder.lee@mediatek.com>, <Rex-BC.Chen@mediatek.com>,
<TingHan.Shen@mediatek.com>, <Liju-clr.Chen@mediatek.com>,
<Jian.Yang@mediatek.com>
Subject: Re: [PATCH 2/2] dt-bindings: PCI: mediatek-gen3: Add new clock name
Date: Thu, 21 Jul 2022 16:44:08 +0800 [thread overview]
Message-ID: <0f02af3abf6895ae89f735d849a1873e61ca502a.camel@mediatek.com> (raw)
In-Reply-To: <20220720222448.GA4083816-robh@kernel.org>
Hi Rob,
Thanks for your comment.
On Wed, 2022-07-20 at 16:24 -0600, Rob Herring wrote:
> On Sat, Jul 16, 2022 at 03:43:49PM +0800, Jianjun Wang wrote:
> > MT8188 and MT8195 use clock "peri_mem" instead of "top_133m", add
> > new
> > clock name "peri_mem" for MT8188 and MT8195.
>
> This should be part of patch 1.
Sure, I'll merge these two patches into one in the next version.
>
> Clock names for IP blocks should be local to the IP block. IOW,
> named
> after the input name for the clocks or what their function is if you
> don't know that. Neither the old names nor the new name seem to
> follow
> this. At least make the new name follow that convention.
Sorry, I'm not sure if I understand correctly, would you mind providing
an example of this change?
Thanks.
>
> >
> > Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
> > ---
> > .../bindings/pci/mediatek-pcie-gen3.yaml | 42 ++++++++++++++-
> > ----
> > 1 file changed, 32 insertions(+), 10 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-
> > gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-
> > gen3.yaml
> > index 67d2ba25e336..038e25ae0be7 100644
> > --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> > +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> > @@ -43,9 +43,6 @@ description: |+
> > each set has its own address for MSI message, and supports 32
> > MSI vectors
> > to generate interrupt.
> >
> > -allOf:
> > - - $ref: /schemas/pci/pci-bus.yaml#
> > -
> > properties:
> > compatible:
> > oneOf:
> > @@ -85,13 +82,7 @@ properties:
> > maxItems: 6
> >
> > clock-names:
> > - items:
> > - - const: pl_250m
> > - - const: tl_26m
> > - - const: tl_96m
> > - - const: tl_32k
> > - - const: peri_26m
> > - - const: top_133m
> > + maxItems: 6
> >
> > assigned-clocks:
> > maxItems: 1
> > @@ -133,9 +124,40 @@ required:
> > - interrupts
> > - ranges
> > - clocks
> > + - clock-names
> > - '#interrupt-cells'
> > - interrupt-controller
> >
> > +allOf:
> > + - $ref: /schemas/pci/pci-bus.yaml#
> > + - if:
> > + properties:
> > + compatible:
> > + contains:
> > + enum:
> > + - mediatek,mt8188-pcie
> > + - mediatek,mt8195-pcie
> > + then:
> > + properties:
> > + clock-names:
> > + items:
> > + - const: pl_250m
> > + - const: tl_26m
> > + - const: tl_96m
> > + - const: tl_32k
> > + - const: peri_26m
> > + - const: peri_mem
> > + else:
> > + properties:
> > + clock-names:
> > + items:
> > + - const: pl_250m
> > + - const: tl_26m
> > + - const: tl_96m
> > + - const: tl_32k
> > + - const: peri_26m
> > + - const: top_133m
> > +
> > unevaluatedProperties: false
> >
> > examples:
> > --
> > 2.18.0
> >
> >
prev parent reply other threads:[~2022-07-21 8:44 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-16 7:43 [PATCH 0/2] dt-bindings: PCI: mediatek-gen3: Add support for MT8188 and MT8195 Jianjun Wang
2022-07-16 7:43 ` [PATCH 1/2] " Jianjun Wang
2022-07-16 7:43 ` [PATCH 2/2] dt-bindings: PCI: mediatek-gen3: Add new clock name Jianjun Wang
2022-07-20 22:24 ` Rob Herring
2022-07-21 8:44 ` Jianjun Wang [this message]
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