From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from szxga04-in.huawei.com (szxga04-in.huawei.com [45.249.212.190]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 98D2019F12A for ; Tue, 24 Dec 2024 12:15:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.249.212.190 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735042549; cv=none; b=AtM/R6fZ5PpQCbYAqghgupRAOIZLsz4nu75qOxqiOpGNuavEZaQVS5uc6T4Osn8lmW0afSZbxK2538+T01p2jh/VycooN86giISyVcRO379u57s3bV5hzcrDL5kXZYb8gUpGq03Ns70PUs3N59jIxsiriaM1YC/1ktWUoJonk98= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735042549; c=relaxed/simple; bh=hm7MqK8NVgB1lvr4zNC+mYjXpI20YnkE/66BnqdWenE=; h=CC:Subject:To:References:From:Message-ID:Date:MIME-Version: In-Reply-To:Content-Type; b=k19TCnrITZF7iyFlZcVcoMb+yc1c0rLztbOllZlfW++G5Wasp+zDtZ/MoywAL3bjS+lMZyJUDtJUUgeGsCJVYTUHVjYKRgrdoRadtO2dyYETpaSC0pKv4csbbEsVxeo1ue0F+1igzyLA71urLs5XRfTVi5WODLXk3LKrgQmWk3o= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; arc=none smtp.client-ip=45.249.212.190 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Received: from mail.maildlp.com (unknown [172.19.163.17]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4YHYhR3MgXz22jdR; Tue, 24 Dec 2024 20:13:43 +0800 (CST) Received: from kwepemd200014.china.huawei.com (unknown [7.221.188.8]) by mail.maildlp.com (Postfix) with ESMTPS id 65F061A0188; Tue, 24 Dec 2024 20:15:42 +0800 (CST) Received: from [10.67.121.177] (10.67.121.177) by kwepemd200014.china.huawei.com (7.221.188.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.34; Tue, 24 Dec 2024 20:15:41 +0800 CC: , , , , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v10 1/4] cpu/SMT: Provide a default topology_is_primary_thread() To: Jonathan Cameron References: <20241220075313.51502-1-yangyicong@huawei.com> <20241220075313.51502-2-yangyicong@huawei.com> <20241223163448.00004354@huawei.com> From: Yicong Yang Message-ID: <0f487c7e-0a03-e0b8-8bf6-0eebfe582bad@huawei.com> Date: Tue, 24 Dec 2024 20:15:40 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.5.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 In-Reply-To: <20241223163448.00004354@huawei.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: dggems702-chm.china.huawei.com (10.3.19.179) To kwepemd200014.china.huawei.com (7.221.188.8) On 2024/12/24 0:34, Jonathan Cameron wrote: > On Fri, 20 Dec 2024 15:59:27 +0800 > Yicong Yang wrote: > >> On 2024/12/20 15:53, Yicong Yang wrote: >>> From: Yicong Yang >>> >>> Currently if architectures want to support HOTPLUG_SMT they need to >>> provide a topology_is_primary_thread() telling the framework which >>> thread in the SMT cannot offline. However arm64 doesn't have a >>> restriction on which thread in the SMT cannot offline, a simplest >>> choice is that just make 1st thread as the "primary" thread. So >>> just make this as the default implementation in the framework and >>> let architectures like x86 that have special primary thread to >>> override this function (which they've already done). >>> >>> There's no need to provide a stub function if !CONFIG_SMP or >>> !CONFIG_HOTPLUG_SMP. In such case the testing CPU is already >>> the 1st CPU in the SMT so it's always the primary thread. >>> >>> Signed-off-by: Yicong Yang >>> --- >>> As questioned in v9 [1] whether this works on architectures not using >>> CONFIG_GENERIC_ARCH_TOPOLOGY, hacked on LoongArch VM and this also works. >>> Architectures should use this on their own situation. >>> [1] https://lore.kernel.org/linux-arm-kernel/427bd639-33c3-47e4-9e83-68c428eb1a7d@arm.com/ >>> >>> [root@localhost smt]# uname -m >>> loongarch64 >>> [root@localhost smt]# pwd >>> /sys/devices/system/cpu/smt >>> [root@localhost smt]# cat ../possible >>> 0-3 >>> [root@localhost smt]# cat ../online >>> 0-3 >>> [root@localhost smt]# cat control >>> on >>> [root@localhost smt]# echo off > control >>> [root@localhost smt]# cat control >>> off >>> [root@localhost smt]# cat ../online >>> 0,2 >>> [root@localhost smt]# echo on > control >>> [root@localhost smt]# cat control >>> on >>> [root@localhost smt]# cat ../online >>> 0-3 >> >> Tested with below code using the topology_is_primary_thread() introduced >> in this patch. Tested on an ACPI-based QEMU VM emulating SMT2. > Nice bit of testing. > > Given it all seems fine. FWIW > Reviewed-by: Jonathan Cameron > (for original patch, not the longarch one!) thanks. certainly :) > >> >> Subject: [PATCH] LoongArch: Support HOTPLUG_SMT on ACPI-based system >> >> Support HOTPLUG_SMT on ACPI-based system using generic >> topology_is_primary_thread(). >> >> Signed-off-by: Yicong Yang >> --- >> arch/loongarch/Kconfig | 1 + >> arch/loongarch/kernel/acpi.c | 26 ++++++++++++++++++++++++-- >> 2 files changed, 25 insertions(+), 2 deletions(-) >> >> diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig >> index dae3a9104ca6..bed1b0640b97 100644 >> --- a/arch/loongarch/Kconfig >> +++ b/arch/loongarch/Kconfig >> @@ -172,6 +172,7 @@ config LOONGARCH >> select HAVE_SYSCALL_TRACEPOINTS >> select HAVE_TIF_NOHZ >> select HAVE_VIRT_CPU_ACCOUNTING_GEN if !SMP >> + select HOTPLUG_SMT if HOTPLUG_CPU >> select IRQ_FORCED_THREADING >> select IRQ_LOONGARCH_CPU >> select LOCK_MM_AND_FIND_VMA >> diff --git a/arch/loongarch/kernel/acpi.c b/arch/loongarch/kernel/acpi.c >> index 382a09a7152c..e642b0de57e7 100644 >> --- a/arch/loongarch/kernel/acpi.c >> +++ b/arch/loongarch/kernel/acpi.c >> @@ -15,9 +15,11 @@ >> #include >> #include >> #include >> +#include >> #include >> #include >> #include >> +#include >> >> int acpi_disabled; >> EXPORT_SYMBOL(acpi_disabled); >> @@ -175,8 +177,12 @@ int pptt_enabled; >> >> int __init parse_acpi_topology(void) >> { >> + int thread_num, max_smt_thread_num = 1; >> + struct xarray core_threads; >> int cpu, topology_id; >> + void *entry; >> >> + xa_init(&core_threads); >> for_each_possible_cpu(cpu) { >> topology_id = find_acpi_cpu_topology(cpu, 0); >> if (topology_id < 0) { >> @@ -184,19 +190,35 @@ int __init parse_acpi_topology(void) >> return -ENOENT; >> } >> >> - if (acpi_pptt_cpu_is_thread(cpu) <= 0) >> + if (acpi_pptt_cpu_is_thread(cpu) <= 0) { >> cpu_data[cpu].core = topology_id; >> - else { >> + } else { >> topology_id = find_acpi_cpu_topology(cpu, 1); >> if (topology_id < 0) >> return -ENOENT; >> >> cpu_data[cpu].core = topology_id; >> + >> + entry = xa_load(&core_threads, topology_id); >> + if (!entry) { >> + xa_store(&core_threads, topology_id, >> + xa_mk_value(1), GFP_KERNEL); >> + } else { >> + thread_num = xa_to_value(entry); >> + thread_num++; >> + xa_store(&core_threads, topology_id, >> + xa_mk_value(thread_num), GFP_KERNEL); >> + >> + if (thread_num > max_smt_thread_num) >> + max_smt_thread_num = thread_num; >> + } >> } >> } >> >> pptt_enabled = 1; >> >> + cpu_smt_set_num_threads(max_smt_thread_num, max_smt_thread_num); >> + xa_destroy(&core_threads); >> return 0; >> } >> > > . >