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Mon, 18 Nov 2024 06:57:30 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4AI6vTCj021226 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 18 Nov 2024 06:57:29 GMT Received: from [10.64.16.151] (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Sun, 17 Nov 2024 22:57:22 -0800 Message-ID: <0f5a1ce9-060b-44d3-b6f0-da88b26fc57d@quicinc.com> Date: Mon, 18 Nov 2024 14:57:19 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 9/9] arm64: defconfig: Enable SX150X for QCS615 ride board To: Dmitry Baryshkov CC: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , "Krishna Manikandan" , Bjorn Andersson , Konrad Dybcio , "Catalin Marinas" , Will Deacon , Li Liu , Xiangxu Yin , , , , , , References: <20241113-add-display-support-for-qcs615-platform-v2-0-2873eb6fb869@quicinc.com> <20241113-add-display-support-for-qcs615-platform-v2-9-2873eb6fb869@quicinc.com> Content-Language: en-US From: fange zhang In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: VOJNeQms_kWtpsHJqazuKTbSkYBfIOw2 X-Proofpoint-GUID: VOJNeQms_kWtpsHJqazuKTbSkYBfIOw2 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 mlxlogscore=999 phishscore=0 spamscore=0 impostorscore=0 adultscore=0 bulkscore=0 lowpriorityscore=0 priorityscore=1501 mlxscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411180057 On 2024/11/13 20:21, Dmitry Baryshkov wrote: > On Wed, 13 Nov 2024 at 13:53, Fange Zhang wrote: >> >> From: Li Liu >> >> For the QCS615 ride board, enable the SX150X to activate the ANX7625 >> allowing the DSI to output to the mDP through the external bridge. >> The ANX7625 relies on the SX150X chip to perform reset and HPD. >> >> Signed-off-by: Li Liu >> Signed-off-by: Fange Zhang >> --- >> arch/arm64/configs/defconfig | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig >> index c0b8482ac6ad7498487718ba01d11b1c95e7543d..599a339a19435efbee7a5ef80c093b0e8c65f7ff 100644 >> --- a/arch/arm64/configs/defconfig >> +++ b/arch/arm64/configs/defconfig >> @@ -631,6 +631,7 @@ CONFIG_PINCTRL_SM8350=y >> CONFIG_PINCTRL_SM8450=y >> CONFIG_PINCTRL_SM8550=y >> CONFIG_PINCTRL_SM8650=y >> +CONFIG_PINCTRL_SX150X=y > > Your commit message doesn't describe why it needs to be disabled as a > built-in. You are trying to enable it for all defconfig users. > Also the placement of the symbol is not correct. You've added it to > the section with msm pinctrl drivers, while the chip has nothing to do > with msm. ok, will remove it from the patch series > >> CONFIG_PINCTRL_X1E80100=y >> CONFIG_PINCTRL_QCOM_SPMI_PMIC=y >> CONFIG_PINCTRL_LPASS_LPI=m >> >> -- >> 2.34.1 >> > >