Re: [PATCH 2/13] dt-bindings: sound: Add Qualcomm QAIF binding

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 6/24/26 8:59 AM, Harendra Gautam wrote:
> On Tue, Jun 23, 2026 at 9:18 PM Konrad Dybcio
> <konrad.dybcio@oss.qualcomm.com> wrote:
>>
>> On 6/23/26 2:26 PM, Harendra Gautam wrote:
>>> On Tue, Jun 9, 2026 at 3:27 PM Konrad Dybcio
>>> <konrad.dybcio@oss.qualcomm.com> wrote:

[...]

>>>>> +      qcom,qaif-aif-sync-mode:
>>>>> +        $ref: /schemas/types.yaml#/definitions/uint32
>>>>> +        description:
>>>>> +          Sync mode. Use QAIF_AIF_SYNC_MODE_SHORT (0) for short (pulse)
>>>>> +          sync or QAIF_AIF_SYNC_MODE_LONG (1) for long (level) sync.
>>>>> +      qcom,qaif-aif-sync-src:
>>>>> +        $ref: /schemas/types.yaml#/definitions/uint32
>>>>> +        description:
>>>>> +          Sync source. Use QAIF_AIF_SYNC_SRC_SLAVE (0) for slave mode
>>>>> +          or QAIF_AIF_SYNC_SRC_MASTER (1) for master mode.
>>>>
>>>> Should these be boolean flags then?
>>> It should not be, the intention is to define explicitly, for better
>>> readability I can rename these flags as EXTERNAL/INTERNAL, Please
>>> suggest.
>>
>> Are all 4 combinations of them being present/absent valid on shikra?
>>
>> Konrad
> Sorry if I did not put details properly, I will be correcting in the
> next patch. sync-src can be external clock or internal clock, where 0
> means external and 1 means internal.

What I meant to ask is whether all combinations of qcom,qaif-aif-sync-mode
and qcom,qaif-aif-sync-src being present/absent (set to 0/1) are actually
valid and should be supported

Konrad