From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id ED6D6322B7D for ; Mon, 5 Jan 2026 17:09:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767633003; cv=none; b=A86ClWCg3LGDjZeshmgv5uRchkUd3GJ/pQmLvB/vaC9hQoQ+SmmjyW1nxAKVPsPlXF9ypUkuYZP2KmZnHS7OznRnDIgVSq1I4htDtA211TzKiVzeZZ8E5VNqybb0f0l64ssM83XPDZI+taWriKvDtkrNt70D2yc7MosV24e1f0w= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767633003; c=relaxed/simple; bh=TdQbdPDYrCYM6ISFOH6ggKrimpvGM+sMp9JmNEZT4BE=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=NqkWCEiwPIE3DxHlSXRl6MU3pOTJ4poQEtlhUVck2mgkkkEjoJOdC0DukrVou9BLTE1ev9rIDLMNKFVGpBqfKOZdUnpQr0DMsw8OsN9vlH0nELmQ5ZY1ZYwIh6xhf6eiGueUctzyz8nNcBUixmNBEstkYhK3CwVmRg129GBWhrw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5CDF7339; Mon, 5 Jan 2026 09:09:47 -0800 (PST) Received: from [10.1.38.150] (XHFQ2J9959.cambridge.arm.com [10.1.38.150]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E6AC93F5A1; Mon, 5 Jan 2026 09:09:52 -0800 (PST) Message-ID: <0fdb0dfc-d558-41f8-9c8d-d179892f35a9@arm.com> Date: Mon, 5 Jan 2026 17:09:51 +0000 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 01/13] arm64: mm: Re-implement the __tlbi_level macro as a C function Content-Language: en-GB To: Linu Cherian Cc: Will Deacon , Ard Biesheuvel , Catalin Marinas , Mark Rutland , Linus Torvalds , Oliver Upton , Marc Zyngier , Dev Jain , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20251216144601.2106412-1-ryan.roberts@arm.com> <20251216144601.2106412-2-ryan.roberts@arm.com> From: Ryan Roberts In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 05/01/2026 05:30, Linu Cherian wrote: > Ryan, > > On Tue, Dec 16, 2025 at 02:45:46PM +0000, Ryan Roberts wrote: >> As part of efforts to reduce our reliance on complex preprocessor macros >> for TLB invalidation routines, convert the __tlbi_level macro to a C >> function for by-level TLB invalidation. >> >> Each specific tlbi level op is implemented as a C function and the >> appropriate function pointer is passed to __tlbi_level(). Since >> everything is declared inline and is statically resolvable, the compiler >> will convert the indirect function call to a direct inline execution. >> >> Suggested-by: Linus Torvalds >> Signed-off-by: Ryan Roberts >> --- >> arch/arm64/include/asm/tlbflush.h | 69 +++++++++++++++++++++++++------ >> 1 file changed, 56 insertions(+), 13 deletions(-) >> >> diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h >> index a2d65d7d6aae..13a59cf28943 100644 >> --- a/arch/arm64/include/asm/tlbflush.h >> +++ b/arch/arm64/include/asm/tlbflush.h >> @@ -105,19 +105,62 @@ static inline unsigned long get_trans_granule(void) >> >> #define TLBI_TTL_UNKNOWN INT_MAX >> >> -#define __tlbi_level(op, addr, level) do { \ >> - u64 arg = addr; \ >> - \ >> - if (alternative_has_cap_unlikely(ARM64_HAS_ARMv8_4_TTL) && \ >> - level >= 0 && level <= 3) { \ >> - u64 ttl = level & 3; \ >> - ttl |= get_trans_granule() << 2; \ >> - arg &= ~TLBI_TTL_MASK; \ >> - arg |= FIELD_PREP(TLBI_TTL_MASK, ttl); \ >> - } \ >> - \ >> - __tlbi(op, arg); \ >> -} while(0) >> +typedef void (*tlbi_op)(u64 arg); >> + >> +static __always_inline void vae1is(u64 arg) >> +{ >> + __tlbi(vae1is, arg); >> +} >> + >> +static __always_inline void vae2is(u64 arg) >> +{ >> + __tlbi(vae2is, arg); >> +} >> + >> +static __always_inline void vale1(u64 arg) >> +{ >> + __tlbi(vale1, arg); >> + __tlbi_user(vale1, arg); > > Should the __tlbi_user addition be added as part of patch 3 ? Yes, it should; good spot! > >> +} >> + >> +static __always_inline void vale1is(u64 arg) >> +{ >> + __tlbi(vale1is, arg); >> +} >> + >> +static __always_inline void vale2is(u64 arg) >> +{ >> + __tlbi(vale2is, arg); >> +} >> + >> +static __always_inline void vaale1is(u64 arg) >> +{ >> + __tlbi(vaale1is, arg); >> +} >> + >> +static __always_inline void ipas2e1(u64 arg) >> +{ >> + __tlbi(ipas2e1, arg); >> +} >> + >> +static __always_inline void ipas2e1is(u64 arg) >> +{ >> + __tlbi(ipas2e1is, arg); >> +} >> + >> +static __always_inline void __tlbi_level(tlbi_op op, u64 addr, u32 level) >> +{ >> + u64 arg = addr; >> + >> + if (alternative_has_cap_unlikely(ARM64_HAS_ARMv8_4_TTL) && level <= 3) { >> + u64 ttl = level | (get_trans_granule() << 2); >> + >> + arg &= ~TLBI_TTL_MASK; >> + arg |= FIELD_PREP(TLBI_TTL_MASK, ttl); >> + } >> + >> + op(arg); >> +} >> >> #define __tlbi_user_level(op, arg, level) do { \ >> if (arm64_kernel_unmapped_at_el0()) \ >> -- >> 2.43.0 >>