From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1E503238C08; Mon, 4 Aug 2025 14:33:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754318034; cv=none; b=B83uycxNCNDkFAzjWo3GihNOvDZaEV7MQj1i/SkrUAQOZMVv3MQXRJ5ZHi1INwqiGTEr9DO/RjE39Jo9qeo4C5sIGe20W+CKCpH0kbjLS2B7p31NC0GdH6bXh/ew/zSlsl99o3djRQmCUP+TJbDZ+Cy4kung1b7W50pcsjkpJic= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754318034; c=relaxed/simple; bh=BxJgaOKe6Tk/0KuMbw7KhSOpDJuDqbXWbDVAWr4BkYs=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=uJfNGhnCve3j40HEDuz9GvKRv/1NtLz3W+NUg0bSH+7HcKF4M5/eM95+iEQ0kyx2Unz3WPa9GCg0THVbonL4+EVcQvuWf/8vHrnNnqIdcSB+9lZuWMadovH7KqHHrEaXt869ygPi5rxTKpfCwf7vIjv90yDXXzzlm2mRBFCmzNE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=hDccK1XX; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="hDccK1XX" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7AEE6C4CEE7; Mon, 4 Aug 2025 14:33:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1754318032; bh=BxJgaOKe6Tk/0KuMbw7KhSOpDJuDqbXWbDVAWr4BkYs=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=hDccK1XXfHHOPEncrfomlcVlIRGiUT9lAsapWMFIznJIE0PQOZiE3jZhEmPhe5Cqe uc7H2TsCA33UyEDJ3xYn4LuarwnMPHi38jocb2SrTIGbWcRaP7Sd17ti3/IQepXquD 6k1/1ngrWbBAa0Tlgm73VWrVijjsZRx+m7EZVgyK7UACoqaljeFiIHpqzwgvk/VhIb MWds0G+6MzBcwwfTzi0rX5ee3ckyyQgYUWWAjvvPkP5fu/lcYtIgj1+tQPbe04hZSe smaVUo2Hlbiv8CNEivm5mE7uce9YwYzHr6sKIxJIJZsDfgmW3eRzP5Nd6HjzKw2LOX 0xnbTQlaWoYSw== Message-ID: <0fe4165d-f198-42cc-9c2f-f1e51bd96716@kernel.org> Date: Mon, 4 Aug 2025 16:33:46 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 09/27] dt-bindings: clock: mediatek: Describe MT8196 clock controllers To: AngeloGioacchino Del Regno , Laura Nao , wenst@chromium.org Cc: conor+dt@kernel.org, devicetree@vger.kernel.org, guangjie.song@mediatek.com, kernel@collabora.com, krzk+dt@kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, matthias.bgg@gmail.com, mturquette@baylibre.com, netdev@vger.kernel.org, nfraprado@collabora.com, p.zabel@pengutronix.de, richardcochran@gmail.com, robh@kernel.org, sboyd@kernel.org References: <20250804083540.19099-1-laura.nao@collabora.com> <373f44c3-8a6a-4d52-ba6b-4c9484e2eac1@kernel.org> <1db77784-a59a-49bd-89b5-9e81e6d3bafc@collabora.com> <00a12553-b248-4193-8017-22fea07ee196@collabora.com> <2555e9fe-3bc0-4f89-9d0b-2f7f946632e7@kernel.org> <3a499702-ba75-4d8a-b38d-222a62bffb34@collabora.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 04/08/2025 16:31, AngeloGioacchino Del Regno wrote: > Il 04/08/25 16:19, Krzysztof Kozlowski ha scritto: >> On 04/08/2025 15:58, Krzysztof Kozlowski wrote: >>>> >>>> So, what should we do then? >>>> >>>> Change it to "mediatek,clock-hw-refcounter", and adding a comment to the binding >>>> saying that this is called "Hardware Voter (HWV)" in the datasheets? >>>> >>>> Or is using the "interconnect" property without any driver in the interconnect API >>>> actually legit? - Because to me it doesn't look like being legit (and if it is, it >>>> shouldn't be, as I'm sure that everyone would expect an interconnect API driver >>>> when encountering an "interconnect" property in DT), and if so, we should just add >>> >>> Why you would not add any interconnect driver for interconnect API? >>> Look, the current phandle allows you to poke in some other MMIO space >>> for the purpose of enabling the clock FOO? So interconnect or power >>> domains or whatever allows you to have existing or new driver to receive >>> xlate() and, when requested resources associated with clock FOO. >> >> Something got here cut. Last sentence is supposed to be: >> >> "So interconnect or power >> domains or whatever allows you to have existing or new driver to receive >> xlate() and, when requested, toggle the resources associated with clock >> FOO." >> >>> >>> Instead of the FOO clock driver poking resources, you do >>> clk_prepare_enable() or pm_domain or icc_enable(). >> >> I looked now at the driver and see your clock drivers poking via regmap >> to other MMIO. That's exactly usecase of syscon and exactly the pattern >> *we are usually discouraging*. It's limited, non-scalable and vendor-driven. >> > > If the HWV wasn't BROKEN, I'd be the first one to go for generic stuff, but > since it is what it is, adding bloat to generic, non vendor-driven APIs would > be bad. > >> If this was a power domain provider then: >> 1. Your clock drivers would only do runtime PM. > > The clock drivers would have to get a list of power domain that is *equal to* > (in their amount) the list of clocks. > But then those are not power domains, as those registers in the MCU are ONLY > ungating a clock and nothing else in the current state of the hardware. > >> 2. Your MCU would be the power domain controller doing whatever is >> necessary - toggling these set/clr bits - when given clock is enabled. > > That MCU does support power domain voting (for two power domains in the main > PD Controller, and for all power domains in the multimedia PD controller), and > this is something completely separated from the *clock* controllers. > > Just to make the picture complete for you: the power domains that this MCU can > manage are not in any way related to the clocks that it can manage. At all. OK, thanks for explanations. Please rephrase commit msg and property description in v4. I am fine in using "hardware voter" terminology in some places, so it will match datasheet, but I want to make it clear that it is not voting for resources how we usually understand it. It's just syscon stuff, poking in other system-like device registers because hardware is like that. Best regards, Krzysztof