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[9.244.8.156]) by smtp.gmail.com with ESMTPSA id 5614622812f47-568f083d000sm1258723b6e.0.2026.11.09.20.45.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Nov 2026 20:45:25 -0800 (PST) From: Enzo Adriano To: andre.przywara@arm.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org Cc: Maxime Ripard , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Junhui Liu , Jerome Brunet , Pablo Mazzini , Vinicius Pedrosa , Alexander Sverdlin , Jun Yan , Lukas Schmid Subject: [PATCH v3 3/3] arm64: dts: allwinner: add Radxa Cubie A7S board Date: Mon, 9 Nov 2026 23:45:23 -0500 Message-ID: <0fe5938e04cc8a5af3825a0e01bd07b626a15b46.1794227241.git.enzo.adriano.code@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: References: X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Enable the Cubie A7S serial console, PMIC and microSD slot to provide an initial usable board configuration. Supply the 26 MHz crystal and 32768 Hz RTC input, enable UART0 and the AXP318W on R-I2C0, and describe the PMIC input/output and CPU supply connections from the Radxa Cubie A7S schematic v1.10. Preserve firmware settings on rails whose working voltage is not established. BLDO2 has no programmed voltage constraint: its software 3.3 V selector does not establish its physical output with the schematic's nominal 2.4 V input. Describe the card's SWOUT2 supply and PF6 active-high detect with an internal pull-down. Enable MMC0 at up to 50 MHz using 3.3 V signaling only. Its high-voltage path uses VCCIO; CLDO5 also feeds PC and the PF 1.8 V input and must not be raised for SD signaling. Firmware must select the 3.3 V PF path; dynamic voltage switching is not provided. Keep other storage off. Connect the documented bank supplies. PL's self-supply phandle is omitted to avoid the PMIC/I2C/pinctrl bootstrap cycle, as on the upstream Cubie A5E; ALDO1 is retained always-on. The separate pinctrl voltage-mode fix is required for these bank-supply connections. These board DTS bytes were RAM-booted on a Cubie A7S with vendor firmware on November 4: UART0, PMIC registration and MMC0 read-only transfers worked. Card writes, physical hotplug, 1.8 V signaling and physical BLDO2 voltage were not tested. Signed-off-by: Enzo Adriano --- arch/arm64/boot/dts/allwinner/Makefile | 1 + .../dts/allwinner/sun60i-a733-cubie-a7s.dts | 284 ++++++++++++++++++ 2 files changed, 285 insertions(+) create mode 100644 arch/arm64/boot/dts/allwinner/sun60i-a733-cubie-a7s.dts diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile index d1f768dd6461..792152525b43 100644 --- a/arch/arm64/boot/dts/allwinner/Makefile +++ b/arch/arm64/boot/dts/allwinner/Makefile @@ -68,3 +68,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun55i-a527-cubie-a5e.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun55i-h728-x96qpro+.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun55i-t527-avaota-a1.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun55i-t527-orangepi-4a.dtb +dtb-$(CONFIG_ARCH_SUNXI) += sun60i-a733-cubie-a7s.dtb diff --git a/arch/arm64/boot/dts/allwinner/sun60i-a733-cubie-a7s.dts b/arch/arm64/boot/dts/allwinner/sun60i-a733-cubie-a7s.dts new file mode 100644 index 000000000000..341c24360ce2 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun60i-a733-cubie-a7s.dts @@ -0,0 +1,284 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR MIT) +/dts-v1/; + +#include "sun60i-a733.dtsi" + +#include + +/ { + model = "Radxa Cubie A7S"; + compatible = "radxa,cubie-a7s", "allwinner,sun60i-a733"; + + aliases { + mmc0 = &mmc0; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reg_ps: regulator-system-power { + compatible = "regulator-fixed"; + regulator-name = "ps"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + reg_ldo_input: regulator-ldo-input { + compatible = "regulator-fixed"; + regulator-name = "ldo-input"; + /* ETA3521: 0.6 V * (1 + RP298 / RP299), 30k / 10k. */ + regulator-min-microvolt = <2400000>; + regulator-max-microvolt = <2400000>; + regulator-always-on; + vin-supply = <®_ps>; + }; + + osc32k: osc32k-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + }; +}; + +&cpu0 { + cpu-supply = <®_dcdc5>; +}; + +&cpu1 { + cpu-supply = <®_dcdc5>; +}; + +&cpu2 { + cpu-supply = <®_dcdc5>; +}; + +&cpu3 { + cpu-supply = <®_dcdc5>; +}; + +&cpu4 { + cpu-supply = <®_dcdc5>; +}; + +&cpu5 { + cpu-supply = <®_dcdc5>; +}; + +&cpu6 { + cpu-supply = <®_dcdc3>; +}; + +&cpu7 { + cpu-supply = <®_dcdc3>; +}; + +&mmc0 { + bus-width = <4>; + cap-sd-highspeed; + cd-gpios = <&pio 5 6 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; + disable-wp; + max-frequency = <50000000>; + no-1-8-v; + vmmc-supply = <®_swout2>; + /* The 3.3 V path uses VCC-IO; no Port F voltage switching yet. */ + vqmmc-supply = <®_swout2>; + status = "okay"; +}; + +&osc { + clock-frequency = <26000000>; +}; + +&pio { + vcc-pb-supply = <®_swout2>; + vcc-pc-supply = <®_cldo5>; + vcc-pd-supply = <®_swout1>; + vcc-pe-supply = <®_bldo1>; + vcc-pf-supply = <®_cldo5>; + vcc-pg-supply = <®_aldo1>; + vcc-ph-supply = <®_swout2>; + vcc-pj-supply = <®_swout1>; + vcc-pk-supply = <®_bldo1>; +}; + +&r_i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&r_i2c0_pl_pins>; + + axp318w: pmic@36 { + compatible = "x-powers,axp318w"; + reg = <0x36>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <1>; + + aldo156in-supply = <®_ps>; + aldo234in-supply = <®_aldo1>; + bldoin-supply = <®_ldo_input>; + cldoin-supply = <®_ldo_input>; + dldoin-supply = <®_ps>; + eldoin-supply = <®_dcdc9>; + ips-supply = <®_ps>; + vin19-supply = <®_ps>; + vin23-supply = <®_ps>; + vin45-supply = <®_ps>; + vin678-supply = <®_ps>; + + regulators { + reg_dcdc1: dcdc1 { + regulator-name = "vcc-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_dcdc2: dcdc2 { + regulator-name = "vdd-sys"; + regulator-always-on; + }; + + reg_dcdc3: dcdc3 { + regulator-name = "vdd-cpub"; + regulator-always-on; + }; + + reg_dcdc4: dcdc4 { + regulator-name = "vdd-gpu"; + regulator-always-on; + }; + + reg_dcdc5: dcdc5 { + regulator-name = "vdd-cpul"; + regulator-always-on; + }; + + reg_dcdc6: dcdc6 { + regulator-name = "vcc-draml"; + regulator-always-on; + }; + + reg_dcdc7: dcdc7 { + regulator-name = "vcc-dram"; + regulator-always-on; + }; + + reg_dcdc8: dcdc8 { + regulator-name = "vcc-ufs-io"; + regulator-always-on; + }; + + reg_dcdc9: dcdc9 { + regulator-name = "eldo-input"; + regulator-always-on; + }; + + reg_swout1: swout1 { + regulator-name = "vcc33-lcd"; + regulator-always-on; + }; + + reg_swout2: swout2 { + regulator-name = "vcc-io-card"; + regulator-always-on; + }; + + reg_aldo1: aldo1 { + regulator-name = "vcc-pl"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_bldo1: bldo1 { + regulator-name = "vcc-pe-pk-mcsi"; + }; + + reg_bldo2: bldo2 { + regulator-name = "vcc-lvds0"; + regulator-always-on; + }; + + reg_bldo4: bldo4 { + regulator-name = "vcc18-codec"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + reg_cldo1: cldo1 { + regulator-name = "vcc33-18-usb"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + reg_cldo2: cldo2 { + regulator-name = "vcc18-hdmi"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + reg_cldo3: cldo3 { + regulator-name = "vcc-pll-dram"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + reg_cldo5: cldo5 { + regulator-name = "vcc18-pf-pc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + reg_dldo1: dldo1 { + regulator-name = "vcc-efuse"; + regulator-always-on; + }; + + reg_dldo6: dldo6 { + regulator-name = "vcc-ufs"; + regulator-always-on; + }; + + reg_eldo1: eldo1 { + regulator-name = "vcc09-vdd2l"; + regulator-always-on; + }; + + reg_eldo6: eldo6 { + regulator-name = "vdd-cpus"; + regulator-always-on; + }; + + reg_rtc_ldo: rtc-ldo { + regulator-name = "vcc-rtc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + }; + }; +}; + +&r_pio { + /* PL powers the PMIC bus itself; firmware must keep ALDO1 enabled. */ + vcc-pm-supply = <®_aldo1>; +}; + +&rtc { + clocks = <&r_ccu CLK_BUS_R_RTC>, <&osc>, <&r_ccu CLK_R_AHB>, + <&osc32k>; + clock-names = "bus", "hosc", "ahb", "ext-osc32k"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pb_pins>; + status = "okay"; +};