> is there really support for SSE prefetch in athlons _without_ SSE?!
> I don't know but this seems wrong...
Yes, according to
<http://www.amd.com/products/cpg/athlon/techdocs/pdf/22466.pdf>.
AMD added several intructions in Athlons including movntq, sfence and
prefetchnta/t0/t1/t2.
The last 4 instructions are what I call "SSE prefetch" (they could
called MMXEXT prefetch instead, but it's not much better).