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Fri, 13 Nov 2026 17:38:08 +0000 (GMT) Received: from [9.39.19.12] (unknown [9.39.19.12]) by smtpav05.dal12v.mail.ibm.com (Postfix) with ESMTP; Fri, 13 Nov 2026 17:38:08 +0000 (GMT) Message-ID: <1044b867-fa18-4654-baf7-dd1e3a5562ef@linux.ibm.com> Date: Fri, 13 Nov 2026 23:08:06 +0530 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/8] powerpc/perf: mpc7450: Event 0x30d does not use the threshold To: Matt Turner , Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , "Christophe Leroy (CS GROUP)" , "Ritesh Harjani (IBM)" , Shrikanth Hegde , Paul Mackerras Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org References: <20261109-ppc32-perf-v1-0-a6e8a55b3b48@gmail.com> <20261109-ppc32-perf-v1-1-a6e8a55b3b48@gmail.com> Content-Language: en-US From: Tanushree Shah In-Reply-To: <20261109-ppc32-perf-v1-1-a6e8a55b3b48@gmail.com> Content-Type: text/plain; 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The manual (MPC7450UM Rev. 5, Table > 11-11) says the event counts the valid FPR issue queue entries each > cycle, with no threshold. PMC3 select 12, the GPR rename buffer event > next to it, is the one that uses the threshold. > > The only effect is that r30d cannot be counted together with a threshold > event that uses a different threshold. Drop it from the list. > > Fixes: 7325927e5a20 ("perf_counter: powerpc: Add processor back-end for MPC7450 family") > Signed-off-by: Matt Turner Hi Matt, I checked Table 11-11 in the manual: PMC3 select 13 (0x30d) counts valid FPR issue queue entries every cycle and has no threshold. On PMC3 only select 12 (0x30c) and select 17 (0x311) use MMCR0[THRESHOLD]. That matches with the code change. Reviewed-by: Tanushree Shah Thanks Tanushree Shah > --- > arch/powerpc/perf/mpc7450-pmu.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/arch/powerpc/perf/mpc7450-pmu.c b/arch/powerpc/perf/mpc7450-pmu.c > index db451b9aac35..564f6dac3a00 100644 > --- a/arch/powerpc/perf/mpc7450-pmu.c > +++ b/arch/powerpc/perf/mpc7450-pmu.c > @@ -65,7 +65,6 @@ static int mpc7450_classify_event(u32 event) > * 12b Y PM_LD_MISS_EXCEED_L1_CYC > * 220 N PM_CQ_EXCEED_CYC > * 30c N PM_GPR_RB_EXCEED_CYC > - * 30d ? PM_FPR_IQ_EXCEED_CYC ? > * 311 Y PM_ITLB_SEARCH_EXCEED > * 410 N PM_GPR_IQ_EXCEED_CYC > */ > @@ -92,7 +91,7 @@ static int mpc7450_threshold_use(u32 event) > return 1; > break; > case 3: > - if (sel == 0xc || sel == 0xd) > + if (sel == 0xc) > return 1; > if (sel == 0x11) > return 2; >