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[88.156.142.67]) by smtp.gmail.com with ESMTPSA id c8-20020a056512324800b00499aefcf68esm3141911lfr.292.2022.12.29.08.39.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 29 Dec 2022 08:39:32 -0800 (PST) Message-ID: <105cae8a-ba03-ea60-70f2-8a307a26ad14@linaro.org> Date: Thu, 29 Dec 2022 17:39:30 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.1 Subject: Re: [PATCH v2 3/3] dt-bindings: hwmon: Add bindings for max31732 Content-Language: en-US To: Guenter Roeck Cc: Sinan Divarci , jdelvare@suse.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-hwmon@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20221214142206.13288-1-Sinan.Divarci@analog.com> <20221214142206.13288-4-Sinan.Divarci@analog.com> <386e3717-a063-a2ea-6028-19d11b5838b0@linaro.org> <20221229155227.GA22937@roeck-us.net> From: Krzysztof Kozlowski In-Reply-To: <20221229155227.GA22937@roeck-us.net> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 29/12/2022 16:52, Guenter Roeck wrote: >>> + adi,alarm1-interrupt-mode: >>> + description: | >>> + Enables the ALARM1 output to function in interrupt mode. >>> + Default ALARM1 output function is comparator mode. >> >> Why this is a property of DT/hardware? Don't encode policy in DT. >> > > I would not call this "policy". Normally it is an implementation > question or decision, since interrupts behave differently depending > on the mode. Impact is difficult to see, though, since the chip > documentation is not available to the public. Some more background would be useful here from the author... > >>> + type: boolean >>> + >>> + adi,alarm2-interrupt-mode: >>> + description: | >>> + Enables the ALARM2 output to function in interrupt mode. >>> + Default ALARM2 output function is comparator mode. >> >> Same question. >> >>> + type: boolean >>> + >>> + adi,alarm1-fault-queue: >>> + description: The number of consecutive faults required to assert ALARM1. >> >> Same question - why this number differs with hardware? >> > > Noisier hardware will require more samples to avoid spurious faults. > Trade-off is speed of reporting a fault. Normally the board designer > would determine a value which is low enough to avoid spurious faults. > > Note that the chip (according to patch 2/3) supports resistance > cancellation as well as beta compensation, which are also board specific. > I don't have access to the datasheet, so I don't know for sure if those > are configurable (typically they are). If they are configurable, I would > expect to see respective properties. If that's the argument behind property, then it's fine. Best regards, Krzysztof