From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753248AbcGFIPH (ORCPT ); Wed, 6 Jul 2016 04:15:07 -0400 Received: from mx6-phx2.redhat.com ([209.132.183.39]:36034 "EHLO mx6-phx2.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752718AbcGFIPE (ORCPT ); Wed, 6 Jul 2016 04:15:04 -0400 Date: Wed, 6 Jul 2016 04:14:57 -0400 (EDT) From: Paolo Bonzini To: Haozhong Zhang Cc: Wanpeng Li , kvm , Radim Krcmar , Yunhong Jiang , Wanpeng Li , linux-kernel@vger.kernel.org, Jan Kiszka Message-ID: <1071146205.4257957.1467792897523.JavaMail.zimbra@redhat.com> In-Reply-To: <20160706080901.ywlvgksrhpdyspmv@hz-desktop> References: <20160706051051.7869-1-haozhong.zhang@intel.com> <20160706060558.sklnb3qso6tnmbrs@hz-desktop> <6d2cd9ce-da0e-8b61-e3a9-78be3b32a6e4@redhat.com> <20160706080146.fnsu3let5p6w7ofa@hz-desktop> <20160706080901.ywlvgksrhpdyspmv@hz-desktop> Subject: Re: [PATCH] KVM: VMX: switch to hrtimer for TSC deadline timer when L2 guest is running MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-Originating-IP: [10.4.164.1, 10.5.101.130] X-Mailer: Zimbra 8.0.6_GA_5922 (ZimbraWebClient - FF47 (Linux)/8.0.6_GA_5922) Thread-Topic: switch to hrtimer for TSC deadline timer when L2 guest is running Thread-Index: 16TU6aYCH8NBm2mV2qnUTEHrKRrR6g== Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > On 07/06/16 16:01, Haozhong Zhang wrote: > > On 07/06/16 09:46, Paolo Bonzini wrote: > > > On 06/07/2016 08:05, Haozhong Zhang wrote: > > > >> > Nested preemption timer is emulated by hrtimer, so it doesn't > > > >> > influence vmcs02, why this is needed? > > > > Nested (L2) preemption timer is not affected for sure, and this patch > > > > is to fix another problem caused by using L1 preemption timer for L1 > > > > TSC deadline timer. When we use L1 VMX preemption timer for L1 TSC > > > > deadline timer, we intend to use the pin-based exec config and the VMX > > > > preemption timer value in vmcs01. However, when L2 guest is running, > > > > vmcs02 is loaded as the current VMCS so that a different VMX > > > > preemption timer config is used (i.e. VMX preemption timer is disabled > > > > in prepare_vmcs02()). If we still use preemption timer for L1 TSC > > > > deadline timer at this moment, then L1 TSC deadline timer will not be > > > > able to be triggered when L2 guest is running. > > > > > > The right fix then is to set the pin-based controls in prepare_vmcs02, > > > based on vcpu->arch.hv_deadline_tsc. > > > > Then KVM needs to distinguish L1 and L2 VMEXITs for preemption timer > > (or does KVM already have this?). The current implementation which > > uses a separate hrtimer for L2 preemption timer can easily distinguish > > them. > > And L1 hypervisor may also want to use preemption timer for L2 > guest. In this case, L0 KVM can not reuse preemption timer for both L1 > and L2. The vmcs12's preemption timer is emulated by KVM through a separate hrtimer, so KVM would only use the vmcs02 preemption timer for the L1 APIC timer. Paolo