RE: pci_alloc_consistent()

[Alex Williamson <alex.williamson@hp.com>]

On Fri, 2004-01-23 at 07:37, Leonid Grossman wrote:
> Hi Jes,
> 
> > Leonid,
> > 
> > What type of Itanium box? It's possible what you're seeing is 
> > caused by a bug in the IOMMU code, but we would need to know 
> > which one (HP, SGI or someone else's).
> 
> The problem with pci_alloc_consistent()above 1MB happens on HP rx2600
> (this is 2U dual-Itanium 900MHz pci-x 133 box). I don't believe it
> happens on 64 bit Opterons. Today we are going to test Dell and SGI
> Itanium systems, as well as a bit newer rx 2600 with Itanium-2 1.5GHz -
> I'll let you know by the end of the day.

   The iommu code on zx1 boxes is currently limited to consistent
mappings of 64 * PAGE_SIZE.  We need to implement the consistent dma
mask interface so that 64bit devices can bypass the iommu and dma as
much as they'd like.  If you change your system page size to 64k, you
should be able to get up to 4MB mappings with the current code.  Sounds
like we need to do a BUG or something to make it more obvious how this
is failing.  It should be a pretty simple update to sba_iommu to make it
start looking at consistent_dma_mask in this path.  I'll try to get a
patch sent out for it on 2.6.  Thanks,

	Alex