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Subject: Re: 4k stacks in 2.6
From: Arjan van de Ven <arjanv@redhat.com>
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> That gave me an idea.  Sometimes in chip design, we 'overconstrain' the=20
> logic synthesizer, because static timing analyzers often produce=20
> inaccurate results.  Anyhow, what if we were to go to 4K stacks but in=20
> static code analysis, flag anything which uses more than 2K or even 1K?

the patch I sent to akpm went to 400 bytes actually, but yeah, even that
already is debatable.

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