Re: [PATCH 0/4] Add support to defer core initialization

[Vidya Sagar <vidyas@nvidia.com>]

On 11/13/2019 2:38 PM, Vidya Sagar wrote:
> EPC/DesignWare core endpoint subsystems assume that the core registers are
> available always for SW to initialize. But, that may not be the case always.
> For example, Tegra194 hardware has the core running on a clock that is derived
> from reference clock that is coming into the endpoint system from host.
> Hence core is made available asynchronously based on when host system is going
> for enumeration of devices. To accommodate this kind of hardwares, support is
> required to defer the core initialization until the respective platform driver
> informs the EPC/DWC endpoint sub-systems that the core is indeed available for
> initiaization. This patch series is attempting to add precisely that.
> This series is based on Kishon's patch that adds notification mechanism
> support from EPC to EPF @ http://patchwork.ozlabs.org/patch/1109884/
> 
> Vidya Sagar (4):
>    PCI: dwc: Add new feature to skip core initialization
>    PCI: endpoint: Add notification for core init completion
>    PCI: dwc: Add API to notify core initialization completion
>    PCI: pci-epf-test: Add support to defer core initialization
> 
>   .../pci/controller/dwc/pcie-designware-ep.c   |  79 +++++++-----
>   drivers/pci/controller/dwc/pcie-designware.h  |  11 ++
>   drivers/pci/endpoint/functions/pci-epf-test.c | 114 ++++++++++++------
>   drivers/pci/endpoint/pci-epc-core.c           |  19 ++-
>   include/linux/pci-epc.h                       |   2 +
>   include/linux/pci-epf.h                       |   5 +
>   6 files changed, 164 insertions(+), 66 deletions(-)
> 

Hi Kishon / Gustavo / Jingoo,
Could you please take a look at this patch series?

- Vidya Sagar