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From: Alan Cox <alan@lxorguk.ukuu.org.uk>
To: Jens Axboe <axboe@suse.de>
Cc: Neil Brown <neilb@cse.unsw.edu.au>,
	Christoph Hellwig <hch@lst.de>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: bug in md write barrier support?
Date: Wed, 08 Sep 2004 23:21:39 +0100	[thread overview]
Message-ID: <1094682098.12280.19.camel@localhost.localdomain> (raw)
In-Reply-To: <20040908154608.GN2258@suse.de>

On Mer, 2004-09-08 at 16:46, Jens Axboe wrote:
> That's a worry if it really does that - does it, or are you just
> speculating about possible problems?

I2O defines cache flush very losely. It flushes the cache and returns
when the cache has been flushed. From playing with the controllers I
have it seems some at least merge further queued writes into the output
stream. Thus if I issue

write 1, 2, 3, 4 , 40, 41, flush cache, write 5, 6, 100

it'll write 1,2,3,4,5,6, 40, 41, report flush cache complete. 

Obviously I can implement full barrier semantics in the driver if need
be but that would cost performance hence the question.



  reply	other threads:[~2004-09-08 23:27 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2004-09-03 17:24 Christoph Hellwig
2004-09-04  0:56 ` Neil Brown
2004-09-04  8:21   ` Jens Axboe
2004-09-06  1:36     ` Neil Brown
2004-09-08  9:23       ` Jens Axboe
2004-09-08 13:35         ` Alan Cox
2004-09-08 15:46           ` Jens Axboe
2004-09-08 22:21             ` Alan Cox [this message]
2004-09-09  8:06               ` Jens Axboe
2004-09-09  8:22                 ` Arjan van de Ven
2004-09-09  8:29                   ` Jens Axboe
2004-09-09 12:51                     ` Alan Cox
2004-09-09 14:34                       ` Jens Axboe
2004-09-12 17:13               ` Rogier Wolff

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