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From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: Junhao He <hejunhao3@huawei.com>,
	mathieu.poirier@linaro.org, mike.leach@linaro.org,
	leo.yan@linaro.org
Cc: coresight@lists.linaro.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, anshuman.khandual@arm.com,
	linuxarm@huawei.com, shenyang39@huawei.com,
	prime.zeng@hisilicon.com
Subject: Re: [PATCH v2] coresight: etm4x: Fix accesses to TRCSEQRSTEVR and TRCSEQSTR
Date: Mon, 16 Jan 2023 10:15:28 +0000	[thread overview]
Message-ID: <109531b9-a844-d1e3-a0cc-a64fb5d35a09@arm.com> (raw)
In-Reply-To: <20230114091632.60095-1-hejunhao3@huawei.com>

On 14/01/2023 09:16, Junhao He wrote:
> The TRCSEQRSTEVR and TRCSEQSTR registers are not implemented if the
> TRCIDR5.NUMSEQSTATE == 0. Skip accessing the registers in such cases.
> 
> Fixes: 2e1cdfe184b5 ("coresight-etm4x: Adding CoreSight ETM4x driver")
> 
> Signed-off-by: Junhao He <hejunhao3@huawei.com>
> Reviewed-by: Mike Leach <mike.leach@linaro.org>
> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>

Queued to coresight next:

https://git.kernel.org/coresight/c/589d928248b72f8

Thanks
Suzuki


      reply	other threads:[~2023-01-16 10:16 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-14  9:16 Junhao He
2023-01-16 10:15 ` Suzuki K Poulose [this message]

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