From: Dave Jiang <dave.jiang@intel.com>
To: Yajun Deng <yajun.deng@linux.dev>, <vkoul@kernel.org>,
<dan.j.williams@intel.com>
Cc: <dmaengine@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2] dmaengine: ioat: fixing the wrong dma_dev->chancnt
Date: Tue, 15 Aug 2023 08:46:43 -0700 [thread overview]
Message-ID: <10a54c9e-eac5-b270-c7ba-262d9b920aed@intel.com> (raw)
In-Reply-To: <20230815061151.2724474-1-yajun.deng@linux.dev>
On 8/14/23 23:11, Yajun Deng wrote:
> The chancnt would be updated in __dma_async_device_channel_register(),
> but it was assigned in ioat_enumerate_channels(). Therefore chancnt has
> the wrong value.
>
> Add chancnt member to the struct ioatdma_device, ioat_dma->chancnt
> is used in ioat, dma_dev->chancnt is used in dmaengine.
>
> Signed-off-by: Yajun Deng <yajun.deng@linux.dev>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Thanks!
> ---
> V1 -> V2: add chancnt member to the struct ioatdma_device.
> ---
> drivers/dma/ioat/dma.h | 1 +
> drivers/dma/ioat/init.c | 19 ++++++++++---------
> 2 files changed, 11 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/dma/ioat/dma.h b/drivers/dma/ioat/dma.h
> index 35e06b382603..a180171087a8 100644
> --- a/drivers/dma/ioat/dma.h
> +++ b/drivers/dma/ioat/dma.h
> @@ -74,6 +74,7 @@ struct ioatdma_device {
> struct dca_provider *dca;
> enum ioat_irq_mode irq_mode;
> u32 cap;
> + int chancnt;
>
> /* shadow version for CB3.3 chan reset errata workaround */
> u64 msixtba0;
> diff --git a/drivers/dma/ioat/init.c b/drivers/dma/ioat/init.c
> index c4602bfc9c74..9c364e92cb82 100644
> --- a/drivers/dma/ioat/init.c
> +++ b/drivers/dma/ioat/init.c
> @@ -420,7 +420,7 @@ int ioat_dma_setup_interrupts(struct ioatdma_device *ioat_dma)
>
> msix:
> /* The number of MSI-X vectors should equal the number of channels */
> - msixcnt = ioat_dma->dma_dev.chancnt;
> + msixcnt = ioat_dma->chancnt;
> for (i = 0; i < msixcnt; i++)
> ioat_dma->msix_entries[i].entry = i;
>
> @@ -511,7 +511,7 @@ static int ioat_probe(struct ioatdma_device *ioat_dma)
> dma_cap_set(DMA_MEMCPY, dma->cap_mask);
> dma->dev = &pdev->dev;
>
> - if (!dma->chancnt) {
> + if (!ioat_dma->chancnt) {
> dev_err(dev, "channel enumeration error\n");
> goto err_setup_interrupts;
> }
> @@ -567,15 +567,16 @@ static void ioat_enumerate_channels(struct ioatdma_device *ioat_dma)
> struct device *dev = &ioat_dma->pdev->dev;
> struct dma_device *dma = &ioat_dma->dma_dev;
> u8 xfercap_log;
> + int chancnt;
> int i;
>
> INIT_LIST_HEAD(&dma->channels);
> - dma->chancnt = readb(ioat_dma->reg_base + IOAT_CHANCNT_OFFSET);
> - dma->chancnt &= 0x1f; /* bits [4:0] valid */
> - if (dma->chancnt > ARRAY_SIZE(ioat_dma->idx)) {
> + chancnt = readb(ioat_dma->reg_base + IOAT_CHANCNT_OFFSET);
> + chancnt &= 0x1f; /* bits [4:0] valid */
> + if (chancnt > ARRAY_SIZE(ioat_dma->idx)) {
> dev_warn(dev, "(%d) exceeds max supported channels (%zu)\n",
> - dma->chancnt, ARRAY_SIZE(ioat_dma->idx));
> - dma->chancnt = ARRAY_SIZE(ioat_dma->idx);
> + chancnt, ARRAY_SIZE(ioat_dma->idx));
> + chancnt = ARRAY_SIZE(ioat_dma->idx);
> }
> xfercap_log = readb(ioat_dma->reg_base + IOAT_XFERCAP_OFFSET);
> xfercap_log &= 0x1f; /* bits [4:0] valid */
> @@ -583,7 +584,7 @@ static void ioat_enumerate_channels(struct ioatdma_device *ioat_dma)
> return;
> dev_dbg(dev, "%s: xfercap = %d\n", __func__, 1 << xfercap_log);
>
> - for (i = 0; i < dma->chancnt; i++) {
> + for (i = 0; i < chancnt; i++) {
> ioat_chan = kzalloc(sizeof(*ioat_chan), GFP_KERNEL);
> if (!ioat_chan)
> break;
> @@ -596,7 +597,7 @@ static void ioat_enumerate_channels(struct ioatdma_device *ioat_dma)
> break;
> }
> }
> - dma->chancnt = i;
> + ioat_dma->chancnt = i;
> }
>
> /**
next prev parent reply other threads:[~2023-08-15 15:49 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-15 6:11 Yajun Deng
2023-08-15 15:46 ` Dave Jiang [this message]
2023-08-21 13:52 ` Vinod Koul
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