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Mon, 23 Feb 2026 12:28:19 -0800 From: Nicolin Chen To: , , CC: , , , , , , , , Subject: [PATCH v3 01/10] iommu/arm-smmu-v3: Add a wrapper for arm_smmu_make_sva_cd() Date: Mon, 23 Feb 2026 12:27:37 -0800 Message-ID: <10bb2ceeea66c6e82f553e9427e779b71d860a72.1771877893.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF00012E60:EE_|DS2PR12MB9688:EE_ X-MS-Office365-Filtering-Correlation-Id: 45213fd7-390f-4dae-4c97-08de731a20d5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|7416014|376014|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?KukUg6y8DczhPx7QYyrH6NHZ1nCbN8/waj+QE89JVVG3EbJNRy+xLhVHoY40?= =?us-ascii?Q?8mSdCNTW1VPZApU14fy9+jQ3lyOue+ka2brN+N3P1hgd/HwWMxzH+nf5zN58?= =?us-ascii?Q?u4pnBt67atZdgFbKAxoOcrTrrSLzmawFVIe6Kn3wz3BGKasr/R+ulb+cWsyo?= =?us-ascii?Q?ivBjhkWeVH/GMZUVGVmhbQdQ9d8m/a9nXPFgfDwInDKEAzf+WNOdfkfuhJy0?= =?us-ascii?Q?KvUMMzbnFFfLF7XVnRGBaDXpS1V0HLoSIDaCrQhhBLwiNPkSW7EM8/E3fSNJ?= =?us-ascii?Q?YSBv6dlYuM9otEUwkFqIbF6F//ZhiCeruILqCTT3PEePYUj2Q5rhM2c0gzRz?= =?us-ascii?Q?qFjNAfsRfS7UxNDg05Hmb9qneIhbmtqEvg9Y4lvlMOX+/Gquhqfgy87F+QHE?= =?us-ascii?Q?Oqj+6ZJ06H+eyKdZq7L7yZHfFGuXBjRReao7KZ0sYAhZEXe9O8yuElS7PrC/?= =?us-ascii?Q?G0dmd84ZAslSW9sJzKpYf3sCgmS+vUfOBwwH97+Ny96zrV7MGF1wA2XI4htP?= =?us-ascii?Q?368PkLyC0sHVB/QqWW3CSj2ReBhXqhYnM6m3DG7v/EHUSYR0vnWxVg53uINy?= =?us-ascii?Q?9rbeB9Cjje2MWxG5UXlw9Js6UU0Fw8J9h6BrFm0JGExYpmGQOWFBQ4S5m6tl?= =?us-ascii?Q?HOnMVdEDk2ktQ794WyL6NmpnVCyEk2ezlnAFCMiQn907Tz+2NLHYNrQ8g7c2?= =?us-ascii?Q?Fdk5Y85XunVEg4/+g7OB6GRpoe3yffg4jUx2hUO8gaIWmjcCCzBoxoxazRJz?= =?us-ascii?Q?ZyQmgt1aAXA6GHOX0WNIfrYwjtR6HQ0RgCtLPnzFwXC+vkjs4cjNt+SScULF?= =?us-ascii?Q?Ni4a/buk/Q+DXLz8hmZkdkTwcP6n9k9jfBmZcjMAHoc29UcAjrWPN6s3F8d2?= =?us-ascii?Q?L9C2SZpVRufPRs2fD/ddnOA4ac4BTA10rL8NYdRSHL4h4b5zrpqgnjbQ+TUD?= =?us-ascii?Q?5S5DcL1gNxXgalWcp4dVgXInEYd22JotocJ9AAQapYTveYnhsntg5fD5qfS+?= =?us-ascii?Q?MhDCvwnp4xh2ObYhrdFmNgoCGrsQRz0j+IWfGBHWGxi8yZ0MNcagaBGhS5+D?= =?us-ascii?Q?1b2RoiB+RjpcOutMzmkovMr4Z54G6OcK3YxpqH2CaMWqBJGp8cwjR1s9EJkM?= =?us-ascii?Q?OcXipmh1lYFngxiTPoUmeKKVi+XoDBLuS/M4af3nGv8ODu4limuCauSWIrlG?= =?us-ascii?Q?rT0647JUGhAWDB9lh5ufhONqHjWAfJlMwwMeePpLRFNsIJ9ozW7FkRvEIrss?= =?us-ascii?Q?7O23z84O8uW2lhX99saB62C6ypEx+/L+1/nrKwV6M5cyswK4jriz0aiIHzZE?= =?us-ascii?Q?B7HMbmPsLiwX2k/VxWUPAjFpOgM/sjSJhlVUljnK3LkQFIZt/KpIBq/GLXdk?= =?us-ascii?Q?4+bJ8mO4COBvLlkLRxEYYHc4zzNXdMFRhwRW/44HTnPdbMZ0APPQVDL6z25x?= =?us-ascii?Q?x/J9Uek8u+rN7uIBblB/5VvJUnHq5KQ6sxPnUhNa7VA7AO1JZYCXvWFUXtKH?= =?us-ascii?Q?RvVVdcVuq5jMcjI9tZ+OJL1StOSN2gxo1OIuc8kAOI1Q+d1g1PftLqRPqARY?= =?us-ascii?Q?C/K7p7m/gU3q3QixkhgzQEUeOXBd4dEsAsVRZo9D6UAvVyfJUd4pz22HEW4l?= =?us-ascii?Q?h+AY9jpFzePFrNKORiSI4WdJhWWmOratyYiJAZFJp8HE0upPHuPTdj83tS/1?= =?us-ascii?Q?Hw9Nrg=3D=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(7416014)(376014)(1800799024);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Qz2xTBqhiT3DIrYZRjwoCEAVnrUzf2OJ6mTL0ydZK3glFmXccc5YkRdfHCvjh//peUX1CUiFjSQCWGEP5zH6+QIfyeVefucPqG9FNNkhecaZibo1j7eQ4PqUmRz79U5gjIkIoTwsjCcNVUVuXXKPfyxmCNS0DXd+nQzEDVi3eXtPaSP+8hMWgqEE18HKDPYZZIK6e2FU/ciK8o33M6g5svGwpEqjXL21hHiH03xY6Ugkhp7eKTiBNVsSjDnWBg+XEx55TKxXWdAdCn2sHVUCmIMuGT3UrLlvt2ZSm9AkmPCXwF2BveELiRyloxfKM5MVAgHEcI8CFwP29QdB+qIW25eB2+xYQDqEpArvT57w57gwHfdHYDjMy+yYPFxTtTDL2LTeiCguXEHd+ILKSgtb8rjd4bZzp18hIHps63iafhFGE/oDcp2KKbnF66WS5kXv X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Feb 2026 20:28:38.9332 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 45213fd7-390f-4dae-4c97-08de731a20d5 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF00012E60.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS2PR12MB9688 Rename the existing arm_smmu_make_sva_cd() to __arm_smmu_make_sva_cd(). Add a higher-level wrapper arm_smmu_make_s1_cd() receiving smmu_domain and master pointers, aligning with arm_smmu_make_s1_cd(). Then, the two function can share a common typedef function pointer. No functional changes. Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 6 ++--- .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 22 +++++++++++++------ .../iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c | 4 ++-- 3 files changed, 20 insertions(+), 12 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index 36de2b0b2ebe6..dd5d2b5acf664 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -1019,9 +1019,9 @@ void arm_smmu_make_bypass_ste(struct arm_smmu_device *smmu, void arm_smmu_make_cdtable_ste(struct arm_smmu_ste *target, struct arm_smmu_master *master, bool ats_enabled, unsigned int s1dss); -void arm_smmu_make_sva_cd(struct arm_smmu_cd *target, - struct arm_smmu_master *master, struct mm_struct *mm, - u16 asid); +void __arm_smmu_make_sva_cd(struct arm_smmu_cd *target, + struct arm_smmu_master *master, + struct mm_struct *mm, u16 asid); struct arm_smmu_invs *arm_smmu_invs_merge(struct arm_smmu_invs *invs, struct arm_smmu_invs *to_merge); diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c index f1f8e01a7e914..414fc899140f7 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c @@ -48,9 +48,9 @@ static u64 page_size_to_cd(void) } VISIBLE_IF_KUNIT -void arm_smmu_make_sva_cd(struct arm_smmu_cd *target, - struct arm_smmu_master *master, struct mm_struct *mm, - u16 asid) +void __arm_smmu_make_sva_cd(struct arm_smmu_cd *target, + struct arm_smmu_master *master, + struct mm_struct *mm, u16 asid) { u64 par; @@ -120,7 +120,15 @@ void arm_smmu_make_sva_cd(struct arm_smmu_cd *target, if (system_supports_poe() || system_supports_gcs()) dev_warn_once(master->smmu->dev, "SVA devices ignore permission overlays and GCS\n"); } -EXPORT_SYMBOL_IF_KUNIT(arm_smmu_make_sva_cd); +EXPORT_SYMBOL_IF_KUNIT(__arm_smmu_make_sva_cd); + +static void arm_smmu_make_sva_cd(struct arm_smmu_cd *target, + struct arm_smmu_master *master, + struct arm_smmu_domain *smmu_domain) +{ + __arm_smmu_make_sva_cd(target, master, smmu_domain->domain.mm, + smmu_domain->cd.asid); +} static void arm_smmu_mm_arch_invalidate_secondary_tlbs(struct mmu_notifier *mn, struct mm_struct *mm, @@ -162,8 +170,8 @@ static void arm_smmu_mm_release(struct mmu_notifier *mn, struct mm_struct *mm) cdptr = arm_smmu_get_cd_ptr(master, master_domain->ssid); if (WARN_ON(!cdptr)) continue; - arm_smmu_make_sva_cd(&target, master, NULL, - smmu_domain->cd.asid); + __arm_smmu_make_sva_cd(&target, master, NULL, + smmu_domain->cd.asid); arm_smmu_write_cd_entry(master, master_domain->ssid, cdptr, &target); } @@ -265,7 +273,7 @@ static int arm_smmu_sva_set_dev_pasid(struct iommu_domain *domain, * This does not need the arm_smmu_asid_lock because SVA domains never * get reassigned */ - arm_smmu_make_sva_cd(&target, master, domain->mm, smmu_domain->cd.asid); + arm_smmu_make_sva_cd(&target, master, smmu_domain); ret = arm_smmu_set_pasid(master, smmu_domain, id, &target, old); mmput(domain->mm); diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c index 7b8035b1db24d..bf4412e904b01 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c @@ -546,7 +546,7 @@ static void arm_smmu_test_make_sva_cd(struct arm_smmu_cd *cd, unsigned int asid) .smmu = &smmu, }; - arm_smmu_make_sva_cd(cd, &master, &sva_mm, asid); + __arm_smmu_make_sva_cd(cd, &master, &sva_mm, asid); } static void arm_smmu_test_make_sva_release_cd(struct arm_smmu_cd *cd, @@ -556,7 +556,7 @@ static void arm_smmu_test_make_sva_release_cd(struct arm_smmu_cd *cd, .smmu = &smmu, }; - arm_smmu_make_sva_cd(cd, &master, NULL, asid); + __arm_smmu_make_sva_cd(cd, &master, NULL, asid); } static void arm_smmu_v3_write_ste_test_s1_to_s2_stall(struct kunit *test) -- 2.43.0