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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8037de142csm3264454166b.38.2025.12.29.05.07.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 29 Dec 2025 05:07:19 -0800 (PST) Message-ID: <10bc67e8-e9e9-491d-9e38-4b55735d42fe@oss.qualcomm.com> Date: Mon, 29 Dec 2025 14:07:17 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/8] remoteproc: qcom_q6v5_mss: Add MSM8917 To: barnabas.czeman@mainlining.org Cc: Stephan Gerhold , Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stephan Gerhold , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20251228-mss-v1-0-aeb36b1f7a3f@mainlining.org> <20251228-mss-v1-4-aeb36b1f7a3f@mainlining.org> <2898fde7-2b3b-471b-8f8f-a02cb6953aaf@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=Raidyltv c=1 sm=1 tr=0 ts=69527d09 cx=c_pps a=S/uc88zpIJVNbziUnJ6G4Q==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=Oh2cFVv5AAAA:8 a=qC_FGOx9AAAA:8 a=OuZLqq7tAAAA:8 a=2IBVnRfEnaAdcxqTa4wA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=nd2WpGr1bMy9NW-iytEl:22 a=7KeoIwV6GZqOttXkcoxL:22 a=fsdK_YakeE02zTmptMdW:22 a=AKGiAy9iJ-JzxKVHQNES:22 X-Proofpoint-ORIG-GUID: 9n2PiUSbm6omo983DscWLFaMjoeYEvqe X-Proofpoint-GUID: 9n2PiUSbm6omo983DscWLFaMjoeYEvqe X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjI5MDEyMiBTYWx0ZWRfX9xWzeHEg7CQL SNYgEugeZqlNI3oDjr/ThKnFiNRZLrdhXp4eRCc2pRxtkuRRPFEuf/pT+Xy09JLx4jbTWGFmzhK 0UklTdh4TFv2HCpOMrrFCIaeDwAZG15rEi/D4Ry8Wu3nhIWPA2bOR4OpaCf3qYwQX+afD9gu4Zi 5ySTnY0Ydo9rr+eX1oeIHDljwx9soD7ZD14ovptRsnJCwZLbKhvA0e2YCy9GCoHushIvnVmSRDL PJH3yzj/R9Igrp62TDezlwRMMXtGDrGzYiR4tJBtsriEMyS3U/djhgONu7XHMJgPgpw9DlRfMHC MP7e2k+B8oamRx3b+eYI2i7sXxtszWauqDsM2yADdPEQAxbbgxDUAWhLoq2e2jCoGnd/tF7YSSD dRuA4ubrtL4m4qmW+9hPfnuEJeAhTSg2XeVH9bxd/gLlwplqOXUcpiE8cfKIyNgbu7Y1/XbD2Gz fkugi0siagaE9EmLFag== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-29_04,2025-12-29_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 clxscore=1015 phishscore=0 impostorscore=0 suspectscore=0 lowpriorityscore=0 bulkscore=0 malwarescore=0 spamscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2512290122 On 12/29/25 1:59 PM, barnabas.czeman@mainlining.org wrote: > On 2025-12-29 13:51, barnabas.czeman@mainlining.org wrote: >> On 2025-12-29 13:40, Konrad Dybcio wrote: >>> On 12/29/25 1:33 PM, barnabas.czeman@mainlining.org wrote: >>>> On 2025-12-29 12:08, Stephan Gerhold wrote: >>>>> On Sun, Dec 28, 2025 at 03:21:54PM +0100, Barnabás Czémán wrote: >>>>>> Add support for MSM8917 MSS it is similar for MDM9607 MSS >>>>>> only difference is the mss power domain. >>>>>> >>>>>> Signed-off-by: Barnabás Czémán >>>>>> --- >>>>>>  drivers/remoteproc/qcom_q6v5_mss.c | 46 ++++++++++++++++++++++++++++++++++++-- >>>>>>  1 file changed, 44 insertions(+), 2 deletions(-) >>>>>> >>>>>> diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c >>>>>> index ffafbe501a05..2579558fb567 100644 >>>>>> --- a/drivers/remoteproc/qcom_q6v5_mss.c >>>>>> +++ b/drivers/remoteproc/qcom_q6v5_mss.c >>>>>> @@ -259,6 +259,7 @@ enum { >>>>>>      MSS_MSM8226, >>>>>>      MSS_MSM8909, >>>>>>      MSS_MSM8916, >>>>>> +    MSS_MSM8917, >>>>>>      MSS_MSM8926, >>>>>>      MSS_MSM8953, >>>>>>      MSS_MSM8974, >>>>>> @@ -749,13 +750,15 @@ static int q6v5proc_reset(struct q6v5 *qproc) >>>>>>          goto pbl_wait; >>>>>>      } else if (qproc->version == MSS_MDM9607 || >>>>>>             qproc->version == MSS_MSM8909 || >>>>>> +           qproc->version == MSS_MSM8917 || >>>>>>             qproc->version == MSS_MSM8953 || >>>>>>             qproc->version == MSS_MSM8996 || >>>>>>             qproc->version == MSS_MSM8998 || >>>>>>             qproc->version == MSS_SDM660) { >>>>>> >>>>>>          /* Override the ACC value if required */ >>>>>> -        if (qproc->version == MSS_MDM9607) >>>>>> +        if (qproc->version == MSS_MDM9607 || >>>>>> +            qproc->version == MSS_MSM8917) >>>>>>              writel(QDSP6SS_ACC_OVERRIDE_VAL_9607, >>>>>>                     qproc->reg_base + QDSP6SS_STRAP_ACC); >>>>>>          else if (qproc->version != MSS_MSM8909 && >>>>>> @@ -817,6 +820,7 @@ static int q6v5proc_reset(struct q6v5 *qproc) >>>>>> >>>>>>              /* Turn on L1, L2, ETB and JU memories 1 at a time */ >>>>>>              if (qproc->version == MSS_MDM9607 || >>>>>> +                qproc->version == MSS_MSM8917 || >>>>>>                  qproc->version == MSS_MSM8953 || >>>>>>                  qproc->version == MSS_MSM8996) { >>>>>>                  mem_pwr_ctl = QDSP6SS_MEM_PWR_CTL; >>>>>> @@ -826,7 +830,8 @@ static int q6v5proc_reset(struct q6v5 *qproc) >>>>>>                   * Set first 5 bits in reverse to avoid >>>>>>                   * "inrush current" issues. >>>>>>                   */ >>>>>> -                if (qproc->version == MSS_MDM9607) >>>>>> +                if (qproc->version == MSS_MDM9607 || >>>>>> +                    qproc->version == MSS_MSM8917) >>>>>>                      reverse = 6; >>>>>>              } else { >>>>>>                  /* MSS_MSM8998, MSS_SDM660 */ >>>>>> @@ -2538,6 +2543,42 @@ static const struct rproc_hexagon_res msm8916_mss = { >>>>>>      .version = MSS_MSM8916, >>>>>>  }; >>>>>> >>>>>> +static const struct rproc_hexagon_res msm8917_mss = { >>>>>> +    .hexagon_mba_image = "mba.mbn", >>>>>> +    .proxy_supply = (struct qcom_mss_reg_res[]) { >>>>>> +        { >>>>>> +            .supply = "pll", >>>>>> +            .uA = 100000, >>>>>> +        }, >>>>>> +        {} >>>>>> +    }, >>>>>> +    .proxy_clk_names = (char*[]){ >>>>>> +        "xo", >>>>>> +        NULL >>>>>> +    }, >>>>>> +    .active_clk_names = (char*[]){ >>>>>> +        "iface", >>>>>> +        "bus", >>>>>> +        "mem", >>>>>> +        NULL >>>>>> +    }, >>>>>> +    .proxy_pd_names = (char*[]) { >>>>>> +        "cx", >>>>>> +        "mx", >>>>>> +        "mss", >>>>> >>>>> Are you sure mss/pm8937_s1 also works as a power domain? It seems to be >>>>> a plain regulator downstream (similar to msm8226/msm8974). >>>>> >>>>> Same thing applies to MSM8953 as well though and there we seem to have >>>>> decided to model it as a power domain ... >>>> They have this at downstream, i guess this is why handled as a power domain. >>>> vdd_mss-uV = ; >>> >>> It seems to be just a normal regulator on both 8917 and 8953 >>> >>> https://android.googlesource.com/kernel/msm/+/android-7.1.0_r0.2/arch/arm/boot/dts/qcom/msm8953-regulator.dtsi >>> https://android.googlesource.com/kernel/msm/+/android-7.1.0_r0.2/arch/arm/boot/dts/qcom/msm8953.dtsi >>> >>> https://android.googlesource.com/kernel/msm/+/android-7.1.0_r0.2/arch/arm/boot/dts/qcom/msm8917-regulator.dtsi >>> https://android.googlesource.com/kernel/msm/+/android-7.1.0_r0.2/arch/arm/boot/dts/qcom/msm8917.dtsi >>> >>> Konrad >> It is different between 3.18 and 4.9, 3.18 seems simpler and easier to use it as regulator i will change it >> https://git.codelinaro.org/clo/la/kernel/msm-4.9/-/blob/LA.UM.10.6.2.c26-01500-89xx.0/arch/arm64/boot/dts/qcom/msm8917.dtsi#L1375 >> https://git.codelinaro.org/clo/la/kernel/msm-3.18/-/blob/LA.UM.6.6.c32-05500-89xx.0/arch/arm/boot/dts/qcom/msm8917.dtsi#L1655 > Only question is left what about SDM439 and SDM632? They were introduced at 4.9 maybe that is why it was modified both are inheriting > MSS bindings from 8953 and 8937. Seems both are the same too Konrad