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Tue, 3 Nov 2026 16:08:35 +0100 Message-ID: <10bc732a-e36b-4067-ac97-1e8ac15ba1f9@foss.st.com> Date: Tue, 3 Nov 2026 16:08:33 +0100 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/3] mmc: mmci: stm32: do not use NEGEDGE in HS200 mode To: CC: Ulf Hansson , , Russell King , Linus Walleij , Yann Gautier , Maxime Coquelin , Alexandre Torgue , , , , References: <20261031120700.42576-1-mateusz.nowicki@posteo.net> <20261031120700.42576-3-mateusz.nowicki@posteo.net> Content-Language: en-US From: Christophe KERELLO In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: STKCAS1NODE1.st.com (10.75.128.134) To STKDAG1NODE2.st.com (10.75.128.133) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AMS1EPF00000097:EE_|AS1PR10MB5747:EE_ X-MS-Office365-Filtering-Correlation-Id: 0908601a-5475-49c0-afe3-08df39bc5a1d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700016|7416014|376014|1800799024|23010399003|3023799007|6133799003|10067099003|18002099003|22082099003|261102123227099003|56012099006|11063799006|4143699003|261022105027099003|261026121527099003|261022075727099003|261026140227099003|261028144727099003|261021121427099003|261021123027099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: XS0AL6yw6D9+Sb9T14IJ8ryV5WU5JXRwZoRqQFh2nbsXiXoohRop8c8/dtV09DnPa7I8oLbI95SHbIiZEekTJSPz0ZdrIT8p9b4DxA/M7GWQT0NsAErR5sUZK7erdecakp4C4/JdnvxrTZL1Us4X0z0HuVJKhLHnAwx3/1SArczxXBLgcT6Rj8iLXxY2Xd6xwegH+KdKf2qZTkseH9d553GzgE0V9n7ybfMZt6YNd6ARt+YSVf5KdTjnFj5e7Uo4glG7n2pa2hM6ow3ffC737rvNWLPpfoMc00W0NNZMpcL+FzVQS05PaoYGX8uVwVFb9yWD7BuARS3zp5+8H36RL50wjhRyCMzU1HClm99bMOz6+kNL63+7Rk4kBOjcxGQtho4YJQsTAnuysqRhZ+DCkrWYSA2upQMFt+ZIYgjnHcbrXydPmE9En0s2YMEYxkfQ X-OriginatorOrg: foss.st.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Nov 2026 15:08:43.7610 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0908601a-5475-49c0-afe3-08df39bc5a1d X-MS-Exchange-CrossTenant-Id: 75e027c9-20d5-47d5-b82f-77d7cd041e8f X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=75e027c9-20d5-47d5-b82f-77d7cd041e8f;Ip=[164.130.1.60];Helo=[smtpO365.st.com] X-MS-Exchange-CrossTenant-AuthSource: AMS1EPF00000097.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS1PR10MB5747 Hello Mateusz, On 11/3/26 12:40, mateusz.nowicki@posteo.net wrote: > Hello Christophe, > >> No, it is not what it is written in the RM. If clkdiv is equal to 0, >> NEGEDGE has no effect. >> NEGEDGE has an effect only when clkdiv > 0, so it can be used with >> HS200. > > You're right, thanks for the correction. I read the NA in table 268 as > "not allowed in HS200", but it is only there because CLKDIV is 0 in that > configuration. I'll drop this patch. > >> On ST downstream Linux Kernel, you can find following patch not >> already upstream: >> mmc: mmci: stm32: use the delay block above 100 MHz on stm32mp25 SoC >> (Commit ca3b1cf) >> By applying previous downstream patch + patch 3 of this patchset + >> using  original slew rate that was upstream on >> this board (slew rate set to 2 for the clock IO, 1 for the others >> IOs), HS200 should run on a ST MP25 DK board at 100 MHz. > > Thanks for the pointer, that was the missing piece. I went back to the > DK and tested it with the SDMMC2 kernel clock at 200 MHz, so HS200 runs > at 100 MHz like in mainline. Without ca3b1cf every write test failed, > no matter whether NEGEDGE was set or which pin group I used. With > ca3b1cf all runs were clean, with pins_a as well as with pins_b. I also > checked 150 MHz (no divider, delay block in use), and it works with > both pin groups too. > > So NEGEDGE was never the problem, it was the delay block running at > 100 MHz. I'll include ca3b1cf and 01d3cac in v2, with you as the author. Thank you very much for confirming that everything works correctly in both configurations. I let you submit these two patches upstream; while the commit titles and messages can be adjusted, we simply ask that you retain the original author information as well as the "Signed-off-by" line when the patches originate from the ST downstream branch. Thank you in advance. > > One more thing about the pins. I added the pins_b groups (faster slew > rate) to the DK device tree in 7.4 because pins_a seemed to corrupt data > in HS200 at 100 MHz. Looking at it now, that was the same delay block > issue. Would you like me to send a patch that switches the DK back to > pins_a and drops pins_b? Yes, using pins_a on the DK board is preferable to using pins_b. This helps avoid overshoots on the SDMMC clock signal, which would otherwise occur with faster input/output (I/O) pins. These overshoots can interfere with other functional blocks, such as the USB; therefore, it is better to use I/O pins that provide a "smoother" signal. Since pins_b is not being used, it is best to remove the pins_b configurations for SDMMC2. Regards, Christophe Kerello. > >> This patch breaks also MP13 SoC that is supporting HS200. > > Understood, sorry about that. > > Regards, > Mateusz >