From: "Adivi, Sai Sree Kartheek" <s-adivi@ti.com>
To: "Péter Ujfalusi" <peter.ujfalusi@gmail.com>,
vkoul@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, nm@ti.com, ssantosh@kernel.org,
dmaengine@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, praneeth@ti.com,
vigneshr@ti.com, u-kumar1@ti.com, a-chavda@ti.com
Subject: Re: [PATCH 3/8] drivers: dma: ti: Refactor TI K3 UDMA driver
Date: Wed, 28 May 2025 15:59:16 +0530 [thread overview]
Message-ID: <110b1fb3-da88-4b38-babf-eb0e375100a6@ti.com> (raw)
In-Reply-To: <e823a43e-20a8-4142-875f-a3575cbb0d0b@gmail.com>
On 5/9/2025 7:55 PM, Péter Ujfalusi wrote:
> Hi,
>
> On 28/04/2025 10:20, Sai Sree Kartheek Adivi wrote:
>> Refactors and split the driver into common and device
>> specific parts. There are no functional changes.
>>
>> Signed-off-by: Sai Sree Kartheek Adivi <s-adivi@ti.com>
>> ---
>> drivers/dma/ti/Makefile | 2 +-
>> drivers/dma/ti/k3-udma-common.c | 2909 ++++++++++++++++++++++++
>> drivers/dma/ti/k3-udma.c | 3751 ++-----------------------------
>
> I'm affraid you do need to break this one up a bit. It might be doing it
> correctly, but it is impossible to check with the churn, like ....
noted. I'm working on splitting this. Will post a v2.
>
>> drivers/dma/ti/k3-udma.h | 548 ++++-
>> 4 files changed, 3700 insertions(+), 3510 deletions(-)
>> create mode 100644 drivers/dma/ti/k3-udma-common.c
>
> ...
>
>> -static bool udma_is_chan_running(struct udma_chan *uc)
>> -{
>> - u32 trt_ctl = 0;
>> - u32 rrt_ctl = 0;
>> -
>> - if (uc->tchan)
>> - trt_ctl = udma_tchanrt_read(uc, UDMA_CHAN_RT_CTL_REG);
>> - if (uc->rchan)
>> - rrt_ctl = udma_rchanrt_read(uc, UDMA_CHAN_RT_CTL_REG);
>> -
>> - if (trt_ctl & UDMA_CHAN_RT_CTL_EN || rrt_ctl & UDMA_CHAN_RT_CTL_EN)
>> - return true;
>> -
>> - return false;
>> -}
>> -
>> static bool udma_is_chan_paused(struct udma_chan *uc)
>> {
>> u32 val, pause_mask;
>> @@ -643,189 +88,73 @@ static bool udma_is_chan_paused(struct udma_chan *uc)
>> return false;
>> }
>>
>> -static inline dma_addr_t udma_get_rx_flush_hwdesc_paddr(struct udma_chan *uc)
>> +static void udma_decrement_byte_counters(struct udma_chan *uc, u32 val)
>
>
> These sort of diffs.
>
>> {
>> - return uc->ud->rx_flush.hwdescs[uc->config.pkt_mode].cppi5_desc_paddr;
>> + if (uc->desc->dir == DMA_DEV_TO_MEM) {
>> + udma_rchanrt_write(uc, UDMA_CHAN_RT_BCNT_REG, val);
>> + udma_rchanrt_write(uc, UDMA_CHAN_RT_SBCNT_REG, val);
>> + if (uc->config.ep_type != PSIL_EP_NATIVE)
>> + udma_rchanrt_write(uc, UDMA_CHAN_RT_PEER_BCNT_REG, val);
>> + } else {
>> + udma_tchanrt_write(uc, UDMA_CHAN_RT_BCNT_REG, val);
>> + udma_tchanrt_write(uc, UDMA_CHAN_RT_SBCNT_REG, val);
>> + if (!uc->bchan && uc->config.ep_type != PSIL_EP_NATIVE)
>> + udma_tchanrt_write(uc, UDMA_CHAN_RT_PEER_BCNT_REG, val);
>> + }
>> }
>>
>> -static int udma_push_to_ring(struct udma_chan *uc, int idx)
>> +static void udma_reset_counters(struct udma_chan *uc)
>> {
>
> ...
>
>> +struct udma_dev {
>> + struct dma_device ddev;
>> + struct device *dev;
>> + void __iomem *mmrs[MMR_LAST];
>> + const struct udma_match_data *match_data;
>> + const struct udma_soc_data *soc_data;
>> +
>> + struct udma_tpl bchan_tpl;
>> + struct udma_tpl tchan_tpl;
>> + struct udma_tpl rchan_tpl;
>> +
>> + size_t desc_align; /* alignment to use for descriptors */
>> +
>> + struct udma_tisci_rm tisci_rm;
>> +
>> + struct k3_ringacc *ringacc;
>> +
>> + struct work_struct purge_work;
>> + struct list_head desc_to_purge;
>> + spinlock_t lock;
>> +
>> + struct udma_rx_flush rx_flush;
>> +
>> + int bchan_cnt;
>> + int tchan_cnt;
>> + int echan_cnt;
>> + int rchan_cnt;
>> + int rflow_cnt;
>> + int tflow_cnt;
>> + unsigned long *bchan_map;
>> + unsigned long *tchan_map;
>> + unsigned long *rchan_map;
>> + unsigned long *rflow_gp_map;
>> + unsigned long *rflow_gp_map_allocated;
>> + unsigned long *rflow_in_use;
>> + unsigned long *tflow_map;
>> +
>> + struct udma_bchan *bchans;
>> + struct udma_tchan *tchans;
>> + struct udma_rchan *rchans;
>> + struct udma_rflow *rflows;
>> +
>> + struct udma_chan *channels;
>> + u32 psil_base;
>> + u32 atype;
>> + u32 asel;
>> +
>> + int (*udma_start)(struct udma_chan *uc);
>> + int (*udma_stop)(struct udma_chan *uc);
>> + int (*udma_reset_chan)(struct udma_chan *uc, bool hard);
>> + bool (*udma_is_desc_really_done)(struct udma_chan *uc, struct udma_desc *d);
>> + void (*udma_decrement_byte_counters)(struct udma_chan *uc, u32 val);
>
> You can drop the udma_ prefix, it is clear that they are for udma..
>
>> +};
next prev parent reply other threads:[~2025-05-28 10:29 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-28 7:20 [PATCH 0/8] dmaengine: ti: Add support for BCDMA v2 and PKTDMA v2 Sai Sree Kartheek Adivi
2025-04-28 7:20 ` [PATCH 1/8] dt-bindings: dma: ti: Add document for K3 BCDMA V2 Sai Sree Kartheek Adivi
2025-04-30 10:26 ` Krzysztof Kozlowski
2025-04-28 7:20 ` [PATCH 2/8] dt-bindings: dma: ti: Add document for K3 PKTDMA V2 Sai Sree Kartheek Adivi
2025-04-30 10:26 ` Krzysztof Kozlowski
2025-04-28 7:20 ` [PATCH 3/8] drivers: dma: ti: Refactor TI K3 UDMA driver Sai Sree Kartheek Adivi
2025-04-30 10:28 ` Krzysztof Kozlowski
2025-05-09 14:25 ` Péter Ujfalusi
2025-05-28 10:29 ` Adivi, Sai Sree Kartheek [this message]
2025-04-28 7:20 ` [PATCH 4/8] dmaengine: ti: k3-psil-am62l: Add AM62Lx PSIL and PDMA data Sai Sree Kartheek Adivi
2025-04-28 7:20 ` [PATCH 5/8] drivers: soc: ti: k3-ringacc: handle absence of tisci Sai Sree Kartheek Adivi
2025-04-28 18:45 ` kernel test robot
2025-05-09 16:29 ` Péter Ujfalusi
2025-04-28 7:20 ` [PATCH 6/8] dmaengine: ti: New driver for K3 BCDMA_V2 Sai Sree Kartheek Adivi
2025-04-29 8:05 ` kernel test robot
2025-05-07 7:31 ` kernel test robot
2025-04-28 7:20 ` [PATCH 7/8] dmaengine: ti: k3-udma-v2: Add support for PKTDMA V2 Sai Sree Kartheek Adivi
2025-04-28 7:20 ` [PATCH 8/8] dmaengine: ti: k3-udma-v2: Update glue layer to support " Sai Sree Kartheek Adivi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=110b1fb3-da88-4b38-babf-eb0e375100a6@ti.com \
--to=s-adivi@ti.com \
--cc=a-chavda@ti.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=dmaengine@vger.kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=nm@ti.com \
--cc=peter.ujfalusi@gmail.com \
--cc=praneeth@ti.com \
--cc=robh@kernel.org \
--cc=ssantosh@kernel.org \
--cc=u-kumar1@ti.com \
--cc=vigneshr@ti.com \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®