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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-639f4106c60sm1931662a12.43.2025.10.09.02.19.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 09 Oct 2025 02:19:33 -0700 (PDT) Message-ID: <1118c126-4332-4f9b-afb8-d3da4fa7fa87@oss.qualcomm.com> Date: Thu, 9 Oct 2025 11:19:31 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 8/8] media: iris: enable support for SC7280 platform To: Dmitry Baryshkov Cc: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org References: <20251008-iris-sc7280-v1-0-def050ba5e1f@oss.qualcomm.com> <20251008-iris-sc7280-v1-8-def050ba5e1f@oss.qualcomm.com> <3f1979d4-1438-4c9d-99db-d97a09c5c35b@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDA4MDEyMSBTYWx0ZWRfX+8xM42L6/rF8 DQ1uSnrGE2AHUc+FqdAEQ+9zU+Pc5aRskRN/8gvN2m3gm2SX4DFwj+jqrs3Q1KcwS6zFSE+bkD9 kHnkm4pZbceOgGK1N3UGkG6fHnrim3hiPOcVobZGbEhuMk4qj9KmDRFCLksHtPMv0x2dBtyQy9Y Yjrfi+5GkqQHboEl2mcuufYN3UlipcD5sh0hNzAWNPnkT9qeuenqzLyuhMCrHWlkh6iOD5HrhgH 2wyayUAgy9lcvOx7PUxeatnCkgsWsqiraUiiPt6y2joXoAfVIElJBHZU+bcIFNJNOJNfTnjcrll lJNQJkVTwWpz2D2wDZV5nT/GGkKm1YrHhRgUPnIJL1bcHAgFKSkQ5ZIhqc1FJLSuPImssyNwqA/ NuLhFwQD5H2mE5nWz2+hrTRaCqvCDg== X-Proofpoint-GUID: 4IXV5BhDz93Hk5XxgAeEEq1C0B7GncrP X-Proofpoint-ORIG-GUID: 4IXV5BhDz93Hk5XxgAeEEq1C0B7GncrP X-Authority-Analysis: v=2.4 cv=SJxPlevH c=1 sm=1 tr=0 ts=68e77e28 cx=c_pps a=UgVkIMxJMSkC9lv97toC5g==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=LpQP-O61AAAA:8 a=4qWUmPOJchojXs7f-_4A:9 a=QEXdDO2ut3YA:10 a=1HOtulTD9v-eNWfpl4qZ:22 a=pioyyrs4ZptJ924tMmac:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-09_03,2025-10-06_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 suspectscore=0 impostorscore=0 spamscore=0 phishscore=0 clxscore=1015 bulkscore=0 lowpriorityscore=0 priorityscore=1501 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510080121 On 10/8/25 9:25 PM, Dmitry Baryshkov wrote: > On Wed, Oct 08, 2025 at 10:26:02AM +0200, Konrad Dybcio wrote: >> On 10/8/25 6:33 AM, Dmitry Baryshkov wrote: >>> As a part of migrating code from the old Venus driver to the new Iris >>> one, add support for the SC7280 platform. It is very similar to SM8250, >>> but it (currently) uses no reset controls (there is an optional >>> GCC-generated reset, it will be added later) and no AON registers >>> region. The Venus driver names this platform "IRIS2_1", so the ops in >> >> Which we've learnt in the past is "IRIS2, 1-pipe" > > Well, I'm open for better suggestions. iris_vpu2_no_aon_ops? [...] >>> + writel(CTL_AXI_CLK_HALT | CTL_CLK_HALT, >>> + core->reg_base + WRAPPER_TZ_CTL_AXI_CLOCK_CONFIG); >>> + writel(RESET_HIGH, core->reg_base + WRAPPER_TZ_QNS4PDXFIFO_RESET); >>> + writel(0x0, core->reg_base + WRAPPER_TZ_QNS4PDXFIFO_RESET); >>> + writel(0x0, core->reg_base + WRAPPER_TZ_CTL_AXI_CLOCK_CONFIG); >>> + >>> +disable_power: >>> + iris_disable_unprepare_clock(core, IRIS_AHB_CLK); >> >> ..for this line > > Not only. You missed the absense of AON_WRAPPER_MVP_NOC_LPI_CONTROL / > AON_WRAPPER_MVP_NOC_LPI_STATUS. Which in theory can become a flag in > iris_platform_data. > >> >> but this could be added to that one instead, since both clk APIs and the >> Iris wrappers around it are happy to consume a null pointer (funnily >> enough this one returns !void and is never checked) >> >> similar story for other func additions > > In fact, initially I had them merged, but then I couldn't find an > elegant way to handle AON regs. I can squash them back, if that's the > consensus. Any idea regarding AON regs? Digging in techpack/video, I found: commit c543f70aca8d40c593b8ad342d42e913a422c552 Author: Priyanka Gujjula Date: Fri Feb 14 13:38:31 2020 +0530 msm: vidc: Skip AON register programming for lagoon AON register programming is used to set NOC to low power mode during IRIS2 power off sequence. However AON register memory map is not applicable and hence skipping AON register programming for lagoon. Change-Id: Ib63248d118ed9fecfa5fa87925e8f69625dc1ba8 Signed-off-by: Priyanka Gujjula lagoon being a downstream codename of the aforementioned sm6350 Meaning yeah it's bus topology.. so I think an if-statement within a common flow would be what we want here.. perhaps if (core->iris_platform_data->num_vpp_pipe == 1) just like venus and downstream do for the most part, and kick the can down the road.. In an unlikely event someone decides to implement IRIS2_1 on a brand new SoC, we can delay our worries.. Konrad