From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933580AbcH2PgE (ORCPT ); Mon, 29 Aug 2016 11:36:04 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:45357 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933393AbcH2PgB (ORCPT ); Mon, 29 Aug 2016 11:36:01 -0400 DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org BBD1F615EC Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=shankerd@codeaurora.org Reply-To: shankerd@codeaurora.org Subject: Re: [PATCH] irqchip/gicv3-its: Enable cacheable attribute Read-allocate hints References: <1468294608-30619-1-git-send-email-shankerd@codeaurora.org> <5784A5C8.4080103@arm.com> <5784F188.3010609@codeaurora.org> To: Marc Zyngier , linux-kernel , linux-arm-kernel Cc: Thomas Gleixner , Jason Cooper , Vikram Sethi , Philip Elcan From: Shanker Donthineni Message-ID: <11225da6-559e-c1bd-2ba5-a941595d6532@codeaurora.org> Date: Mon, 29 Aug 2016 10:35:58 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.2.0 MIME-Version: 1.0 In-Reply-To: <5784F188.3010609@codeaurora.org> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Marc, Are you planning to push this change? I talked to Qualcomm ITS hw team and they told me nice to have this change even though we see a small gain. Shanker On 07/12/2016 08:32 AM, Shanker Donthineni wrote: > Hi Marc, > > On 07/12/2016 03:09 AM, Marc Zyngier wrote: >> Hi Shanker, >> >> On 12/07/16 04:36, Shanker Donthineni wrote: >>> Read-allocation hints are not enabled for both the GIC-ITS and GICR >>> tables. This forces the hardware to always read the table contents >>> from an external memory (DDR) which is slow compared to cache memory. >>> Most of the tables are often read by hardware. So, it's better to >>> enable Read-allocate hints in addition to Write-allocate hints in >>> order to improve the GICR_PEND, GICR_PROP, Collection, Device, and >>> vCPU tables lookup time. >> While I'm not opposed to such a change, I'd like to see some evidence >> that this actually makes a difference. Have you measured an improvement >> on a particular implementation? If so, could you share your benchmarking >> method so that it could be be measured on others as well? > I have seen at least 5% performance gain when I was testing direct > VLPI feature > on Qualcomm emulation platforms. On Silicon, this gain is not noticeable. > > >> Thanks, >> >> M. > -- Shanker Donthineni Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.