From: Daniel Walker <dwalker@mvista.com>
To: tglx@linutronix.de
Cc: Ingo Molnar <mingo@elte.hu>, linux-kernel@vger.kernel.org
Subject: Re: 2.6.13-rc7-rt1
Date: Thu, 25 Aug 2005 18:15:44 -0700 [thread overview]
Message-ID: <1125018945.14592.15.camel@dhcp153.mvista.com> (raw)
In-Reply-To: <1125015724.20120.143.camel@tglx.tec.linutronix.de>
On Fri, 2005-08-26 at 02:22 +0200, Thomas Gleixner wrote:
> On Thu, 2005-08-25 at 16:29 -0700, Daniel Walker wrote:
> > Devastating latency on a 3Ghz xeon .. Maybe the raw_spinlock in the
> > timer base is creating a unbounded latency?
>
> The lock is only held for really short periods. The only possible long
> period would be migration of timers from a dead hotplug cpu to another.
> I guess thats not the case.
>
> Do you have HIGH_RES_TIMERS enabled ?
No. The cascade has a very long worst case.
Daniel
next prev parent reply other threads:[~2005-08-26 1:16 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-08-25 6:26 2.6.13-rc7-rt1 Ingo Molnar
2005-08-25 15:36 ` 2.6.13-rc7-rt1 Daniel Walker
2005-08-25 17:45 ` 2.6.13-rc7-rt1 Ingo Molnar
2005-08-25 21:35 ` 2.6.13-rc7-rt1 Daniel Walker
2005-08-26 6:31 ` 2.6.13-rc7-rt1 Ingo Molnar
2005-08-26 14:27 ` 2.6.13-rc7-rt1 Daniel Walker
2005-08-25 17:37 ` 2.6.13-rc7-rt1 Chuck Harding
2005-08-25 21:46 ` 2.6.13-rc7-rt1 Daniel Walker
2005-08-25 21:54 ` 2.6.13-rc7-rt1 Ingo Molnar
2005-08-25 22:11 ` 2.6.13-rc7-rt1 Daniel Walker
2005-08-25 22:19 ` 2.6.13-rc7-rt1 Daniel Walker
2005-08-26 6:32 ` 2.6.13-rc7-rt1 Ingo Molnar
2005-08-25 23:29 ` 2.6.13-rc7-rt1 Daniel Walker
2005-08-26 0:22 ` 2.6.13-rc7-rt1 Thomas Gleixner
2005-08-26 1:15 ` Daniel Walker [this message]
2005-08-26 6:43 ` 2.6.13-rc7-rt1 Thomas Gleixner
2005-08-26 14:17 ` 2.6.13-rc7-rt1 Daniel Walker
2005-08-26 6:17 ` 2.6.13-rc7-rt1 Ingo Molnar
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