From: Ben Horgan <ben.horgan@arm.com>
To: Anshuman Khandual <anshuman.khandual@arm.com>,
linux-arm-kernel@lists.infradead.org
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] arm64/mm: Add remaining TLBI_XXX_MASK macros
Date: Tue, 21 Oct 2025 10:00:35 +0100 [thread overview]
Message-ID: <1148d823-5a89-4f32-911b-f009a8ea5641@arm.com> (raw)
In-Reply-To: <20251021052022.2898275-3-anshuman.khandual@arm.com>
Hi Anshuman,
On 10/21/25 06:20, Anshuman Khandual wrote:
> Add remaining TLBI_XXX_MASK macros and replace current open encoded fields.
> While here replace hard coded page size based shifts but with derived ones
> via ilog2() thus adding some required context.
>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
> ---
> arch/arm64/include/asm/tlbflush.h | 26 ++++++++++++++++++--------
> 1 file changed, 18 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
> index 131096094f5b..cf75fc2a06c3 100644
> --- a/arch/arm64/include/asm/tlbflush.h
> +++ b/arch/arm64/include/asm/tlbflush.h
> @@ -57,9 +57,10 @@
> /* This macro creates a properly formatted VA operand for the TLBI */
> #define __TLBI_VADDR(addr, asid) \
> ({ \
> - unsigned long __ta = (addr) >> 12; \
> - __ta &= GENMASK_ULL(43, 0); \
> - __ta |= (unsigned long)(asid) << 48; \
> + unsigned long __ta = (addr) >> ilog2(SZ_4K); \
> + __ta &= TLBI_BADDR_MASK; \
> + __ta &= ~TLBI_ASID_MASK; \
> + __ta |= FIELD_PREP(TLBI_ASID_MASK, asid); \
> __ta; \
> })
>
> @@ -100,8 +101,17 @@ static inline unsigned long get_trans_granule(void)
> *
> * For Stage-2 invalidation, use the level values provided to that effect
> * in asm/stage2_pgtable.h.
> + *
> + * +----------+------+-------+--------------------------------------+
> + * | ASID | TG | TTL | BADDR |
> + * +-----------------+-------+--------------------------------------+
> + * |63 48|47 46|45 44|43 0|
> + * +----------+------+-------+--------------------------------------+
> */
> -#define TLBI_TTL_MASK GENMASK_ULL(47, 44)
> +#define TLBI_ASID_MASK GENMASK_ULL(63, 48)
> +#define TLBI_TG_MASK GENMASK_ULL(47, 46)
> +#define TLBI_TTL_MASK GENMASK_ULL(45, 44)
The definition of TLBI_TTL_MASK changes here. This might be the correct
thing to do but it should be mentioned in the commit message and the
other user, arch/arm64/kvm/nested.c, needs to be updated in tandem.
> +#define TLBI_BADDR_MASK GENMASK_ULL(43, 0)
>
> #define TLBI_TTL_UNKNOWN INT_MAX
>
Thanks,
Ben
next prev parent reply other threads:[~2025-10-21 9:00 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-21 5:20 [PATCH 0/2] " Anshuman Khandual
2025-10-21 5:20 ` [PATCH 1/2] arm64/mm: Drop redundant 'level' range trimming in __tlbi_level() Anshuman Khandual
2025-10-21 5:20 ` [PATCH 2/2] arm64/mm: Add remaining TLBI_XXX_MASK macros Anshuman Khandual
2025-10-21 9:00 ` Ben Horgan [this message]
2025-10-21 12:45 ` Anshuman Khandual
2025-10-21 13:45 ` Ben Horgan
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