Re: [PATCHSET] block: fix PIO cache coherency bug, take 2

[James Bottomley <James.Bottomley@SteelEye.com>]

On Mon, 2006-06-05 at 15:44 +0100, Russell King wrote:
> Hence I find your comment "There are two cases where devices kmap a
> user page into kernel space and then proceed to read from or write to
> it" to be misleading - at the exact point in time that the device
> driver is manipulating the data in that page, it is not a user page.

zero copy doesn't quite follow that ownership model.  We don't really do
anything to block user access to the page while I/O is underway (the
only time we actually do this is the nopage stuff)  if the user wants do
do something stupid like write to a page they've asked us to read data
into, the resulting coherency cockup is their lookout, and which data
actually ends up in the page undefined.  So, both the user and the
kernel mappings exist on the page while it's undergoing kmap and
modification.

However, regardless of whether it's mapped into user space or not, even
if it were later going to be mapped at a non-congruent user address, the
kernel mappings have to be flushed to make the data written via them
visible to the user (and, for a VIPT cache, they have to be flushed
before the mapping is torn down otherwise we might not have the PTE to
flush them via ...)

James