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[5.147.80.91]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3b76fcc3429sm4041277f8f.75.2025.07.24.23.33.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 24 Jul 2025 23:33:48 -0700 (PDT) Message-ID: <1149732f-bc8d-4339-90c3-e34aeac9f1be@canonical.com> Date: Fri, 25 Jul 2025 08:33:46 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 05/11] riscv: enable landing pad enforcement To: Deepak Gupta Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kbuild@vger.kernel.org, linux-mm@kvack.org, llvm@lists.linux.dev, rick.p.edgecombe@intel.com, broonie@kernel.org, cleger@rivosinc.com, samitolvanen@google.com, apatel@ventanamicro.com, ajones@ventanamicro.com, conor.dooley@microchip.com, charlie@rivosinc.com, samuel.holland@sifive.com, bjorn@rivosinc.com, fweimer@redhat.com, jeffreyalaw@gmail.com, andrew@sifive.com, ved@rivosinc.com, Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Masahiro Yamada , Nathan Chancellor , Nicolas Schier , Andrew Morton , David Hildenbrand , Lorenzo Stoakes , "Liam R. Howlett" , Vlastimil Babka , Mike Rapoport , Suren Baghdasaryan , Michal Hocko , Nick Desaulniers , Bill Wendling , Monk Chiang , Kito Cheng , Justin Stitt References: <20250724-riscv_kcfi-v1-0-04b8fa44c98c@rivosinc.com> <20250724-riscv_kcfi-v1-5-04b8fa44c98c@rivosinc.com> Content-Language: en-US From: Heinrich Schuchardt In-Reply-To: <20250724-riscv_kcfi-v1-5-04b8fa44c98c@rivosinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 25.07.25 01:36, Deepak Gupta wrote: > Enables landing pad enforcement by invoking a SBI FWFT call. > > Signed-off-by: Deepak Gupta > --- > arch/riscv/kernel/asm-offsets.c | 1 + > arch/riscv/kernel/head.S | 19 +++++++++++++++++++ > 2 files changed, 20 insertions(+) > > diff --git a/arch/riscv/kernel/asm-offsets.c b/arch/riscv/kernel/asm-offsets.c > index e4d55126dc3e..e6a9fad86fae 100644 > --- a/arch/riscv/kernel/asm-offsets.c > +++ b/arch/riscv/kernel/asm-offsets.c > @@ -536,6 +536,7 @@ void asm_offsets(void) > DEFINE(SBI_EXT_FWFT, SBI_EXT_FWFT); > DEFINE(SBI_EXT_FWFT_SET, SBI_EXT_FWFT_SET); > DEFINE(SBI_FWFT_SHADOW_STACK, SBI_FWFT_SHADOW_STACK); > + DEFINE(SBI_FWFT_LANDING_PAD, SBI_FWFT_LANDING_PAD); > DEFINE(SBI_FWFT_SET_FLAG_LOCK, SBI_FWFT_SET_FLAG_LOCK); > #endif > } > diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S > index 9c99c5ad6fe8..59af044bf85c 100644 > --- a/arch/riscv/kernel/head.S > +++ b/arch/riscv/kernel/head.S > @@ -185,6 +185,16 @@ secondary_start_sbi: > 1: > #endif > scs_load_current > + > +#if defined(CONFIG_RISCV_SBI) && defined(CONFIG_RISCV_KERNEL_CFI) > + li a7, SBI_EXT_FWFT > + li a6, SBI_EXT_FWFT_SET > + li a0, SBI_FWFT_LANDING_PAD > + li a1, 1 /* enable landing pad for supervisor */ > + li a2, SBI_FWFT_SET_FLAG_LOCK > + ecall /* check for error condition and take appropriate action */ > +#endif > + > call smp_callin > #endif /* CONFIG_SMP */ > > @@ -359,6 +369,15 @@ SYM_CODE_START(_start_kernel) > #endif > scs_load_current > > +#if defined(CONFIG_RISCV_SBI) && defined(CONFIG_RISCV_KERNEL_CFI) > + li a7, SBI_EXT_FWFT > + li a6, SBI_EXT_FWFT_SET > + li a0, SBI_FWFT_LANDING_PAD > + li a1, 1 /* enable landing pad for supervisor */ The SBI specification calls BIT(0) "LOCK". Shouldn't we define a constant for the lock bit instead of using a magic value? Best regards Heinrich > + li a2, SBI_FWFT_SET_FLAG_LOCK > + ecall /* check for error condition and take appropriate action */ > +#endif > + > #ifdef CONFIG_KASAN > call kasan_early_init > #endif >