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Thu, 16 Jul 2026 11:33:49 -0700 (PDT) X-Received: by 2002:a05:622a:43:b0:51c:f3e:781e with SMTP id d75a77b69052e-51cbf2159eamr208523871cf.6.1784226829396; Thu, 16 Jul 2026 11:33:49 -0700 (PDT) Received: from [192.168.120.193] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c16874a2453sm255164466b.56.2026.07.16.11.33.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 16 Jul 2026 11:33:48 -0700 (PDT) Message-ID: <1153ebbd-659f-4ba9-9317-66ece33423e9@oss.qualcomm.com> Date: Thu, 16 Jul 2026 20:33:44 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 11/11] arm64: dts: qcom: shikra: Add gpio-reserved-ranges to tlmm To: Komal Bajaj , Vinod Koul , Frank Li , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Krzysztof Kozlowski , Georgi Djakov , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Anurag Pateriya References: <20260702-shikra-dt-m1-v5-0-f911ac92720c@oss.qualcomm.com> <20260702-shikra-dt-m1-v5-11-f911ac92720c@oss.qualcomm.com> <9c1aab59-14b2-4811-b778-8e96645bd65b@oss.qualcomm.com> <97b205e8-5ab7-4205-b1dc-cbcb0497987d@oss.qualcomm.com> <986da1da-db2e-4d4a-b9d0-70482adaf4bd@oss.qualcomm.com> <4f641f13-a278-4465-8033-670c7279a7e3@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <4f641f13-a278-4465-8033-670c7279a7e3@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=IMIyzAvG c=1 sm=1 tr=0 ts=6a59240f cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=E75d-Z-T5IGyIi2ltCUA:9 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE2MDE5MCBTYWx0ZWRfX/YkDYukRU3aw eS44M8lAp+oH1oSZy+GdBNZNPaehUNyKFB62se63CTAQ/kHfbZQyMDcOWO3NfnysNk9PSqm6dUF Eix/WPKw4zW9Qb/pPtwbl9JqS4LKBgWuV91A1HWDFaXP/trHMcO0Ntx/PGIuVw0wwnvoJnGYu3n pNZbKSmWAEOJAq/GeXw7NYrOBdisPSPdYYGix2RJiIhyhd34+PQLWPd7N/VCpVrTH0fqwbRHaEL enI0e4hiRDFV1990TV8oDze0EYFWvc7AUxD98qroNORohNukLyi5RO4YoYGA9c5XVGww+j+eV86 jlD6RBpicsdJfFdil7o0xzPPAaDtpy9JohYxaXvp7ceMIu0kNTbhph7SsUkldh3WsATtzBqI4/P tZX1VDg3HrCg/sT2bUOfSbh6DZ9nU/4V8gEIy9BI0lctkI81FVqKCR2QdArBeXE3DFo8OVOOSMZ O51jaRasc8sl8LgkOXA== X-Proofpoint-GUID: elAmRnFD19TyLk4kzn-PGYShCBNF4VUw X-Proofpoint-ORIG-GUID: elAmRnFD19TyLk4kzn-PGYShCBNF4VUw X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE2MDE5MCBTYWx0ZWRfX8HhyJvOUHzrG s6zHAWBX8OINLjGtY46VFYm6bmRqdNjrE/Lnsj0pcqMIohwIb5SgxujZCIGJAINOGRcS72NwddF HbtQQAmVVxxrkrySQ3wU6eiiV4VaPCI= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-16_06,2026-07-15_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 lowpriorityscore=0 suspectscore=0 priorityscore=1501 impostorscore=0 bulkscore=0 adultscore=0 phishscore=0 malwarescore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607160190 On 7/15/26 3:41 PM, Komal Bajaj wrote: > > > > On 7/15/2026 3:57 PM, Konrad Dybcio wrote: >> On 7/7/26 6:36 PM, Komal Bajaj wrote: >>> On 7/2/2026 4:25 PM, Konrad Dybcio wrote: >>>> On 7/2/26 11:50 AM, Komal Bajaj wrote: >>>>> Add gpio-reserved-ranges property to the tlmm node for all three >>>>> Shikra EVK variants (CQM, CQS, IQS) to mark GPIOs used by the >>>>> SoC internally and not available for general use. >>>> These are generally added to prevent non-secure access upon TLMM >>>> probe, i.e. the board won't boot if some of them are not protected. >>>> >>>> I assume the proposed set contains both ones that are _absolutely >>>> forbidden_ for Linux to touch, but also ones that are dedicated to >>>> some specific purpose that Linux _shouldn't_ touch. >>> Yes, some GPIOs are reserved for secure-world use and are therefore not accessible from the non-secure world. >>> I will update the commit message accordingly. >> I'm not sure how to read your response. In other words - is this >> patch boot-critical? > > Yes, with Access Policy enabled, it becomes boot-critical. Well then, I'm no less than surprised since we have DTs for 3 boards in -next right now that I'm learning can't possibly boot.. I understand you might have disabled that at some point during the development, but it's clearly not the configuration that's supported by any means. Please make sure to take that into account next time. For this issue, since the pins seem common, perhaps moving them to the SoM DTSI makes more sense. And this most definitely needs 'fixes' tags. Konrad